Projects sharing features with Litex

XiangShan is a high-performance RISC-V processor core and a hardware description language framework. It provides a construction-based system for designing, simulating, and verifying complex processor micro-architectures and peripheral devices. The project includes a high-performance CPU simulator used for architectural exploration and functional verification of processor execution. The project implements a superscalar out-of-order CPU architecture that uses renaming and reorder buffers to execute instructions in parallel. It generates synthesizable Verilog files from hardware descriptions to

rpi4-osdev is a project for bare metal operating system development targeting the Raspberry Pi 4. It focuses on creating a custom operating system that runs directly on the hardware without an underlying kernel or abstraction layer. The project provides a codebase and instructional guide for developing a low-level system from scratch. This process involves transitioning from early boot code to kernel execution on the ARM64 architecture. The technical scope covers embedded system bootstrapping and low-level hardware interfacing. This includes managing memory-mapped I/O, physical address mappi

picorv32 is a size-optimized RISC-V CPU core and synthesizable processor IP designed for integration into FPGA and ASIC hardware designs. It serves as an open-source CPU architecture and embedded system-on-chip component that implements a standard RISC-V instruction set. The design features a modular architecture that allows for the integration of external coprocessors to implement custom non-branching instructions. It includes a parameterized integer unit with configurable multiplication and division cores to balance performance against total logic gate count. The project covers a broad ran

Clash is a functional hardware compiler and hardware description language compiler that translates strongly typed functional programs written in Haskell into synthesizable VHDL, Verilog, and SystemVerilog code. It serves as a development tool allowing digital designers to write hardware descriptions in functional languages and compile them directly to FPGA targets and physical netlists. The compilation infrastructure covers structural hardware compilation, including graph-based code normalization, functional language translation, and netlist generation. It features type-level clock domain saf

Chisel is a hardware construction language and description tool used to define digital circuits. It functions as a generator that converts high-level hardware descriptions into synthesizable Verilog code for use in ASIC and FPGA design. The project enables the creation of parameterizable hardware templates and reusable digital components. It leverages functional and object-oriented programming patterns to transform complex circuit representations into finalized hardware descriptions. The toolset covers the register-transfer level design workflow, allowing users to model digital circuits usin

Logisim Evolution is a digital logic simulator and schematic editor used for designing and verifying digital circuits. It functions as a tool for digital circuit design and real-time logic simulation, allowing users to create schematic representations of electronic hardware using gates and registers. The software distinguishes itself by providing hardware description language tools that allow for the definition of custom component behavior and the translation of visual schematics into synthesis-ready code for FPGA hardware deployment. It also serves as a bridge for physical hardware integrati

GHDL is a compiler and simulator for VHDL hardware descriptions. It functions as a multi-pass analysis elaborator that resolves design hierarchies and dependencies to prepare hardware descriptions for simulation or synthesis. The project transforms VHDL source code into executable binaries for high-speed digital design verification and serves as a synthesis tool that converts descriptions into structural netlists compatible with vendor or open-source flows. It also implements the Language Server Protocol to provide static analysis, autocomplete, and code navigation for VHDL files. The toolse

This project is a tutorial for developing a custom bare metal operating system specifically for the Raspberry Pi 4. It provides the guidance and resources necessary to write software that interacts directly with hardware without the use of a pre-existing kernel. The project centers on an ARM64 cross-compilation toolchain and a build pipeline that transforms source code into raw binary images. It utilizes linker scripts to define physical memory addresses and section placements, ensuring the resulting binary loads at the correct hardware entry point. The codebase covers direct hardware interf

TinyGo is a specialized compiler and development toolkit designed to bring the Go programming language to resource-constrained microcontrollers and WebAssembly environments. It provides a bare-metal runtime environment that enables high-level code execution without the need for a traditional operating system, utilizing an LLVM-based backend to generate efficient machine instructions. The project distinguishes itself through aggressive optimization techniques tailored for small hardware, including a static memory allocation strategy and whole-program dead code elimination that significantly re

Limine is a multiprotocol operating system bootloader that bridges low-level hardware initialization and system software across legacy BIOS and modern UEFI firmware environments. It executes directly on bare-metal hardware without an underlying operating system kernel or standard C library, parsing storage media and filesystems during the early boot sequence before OS drivers load. The software targets diverse processor architectures including x86, ARM, RISC-V, and LoongArch through discrete target binaries built from shared source code. It reads files directly from FAT and ISO9660 storage f

This project is a Lua-based firmware environment for the ESP8266 WiFi chip, providing an embedded Lua interpreter and a development framework for WiFi SoC hardware. It functions as a C-based wrapper around the Espressif non-OS SDK, enabling the execution of asynchronous scripts to manage wireless communication and hardware peripherals. The environment integrates a SPIFFS flash filesystem for storing persistent scripts and data directly on non-volatile memory. To optimize limited hardware resources, the system utilizes execute-in-place flash execution, running read-only constants and instructi

This project is an educational framework and toolkit designed for developing and testing operating system kernels. It provides a structured environment for implementing fundamental system primitives, including virtual memory management, preemptive process scheduling, and filesystem organization, using Rust and C. The framework is specifically oriented toward RISC-V and x86 architectures, serving as a laboratory for learning how to build core system software from the ground up. The project distinguishes itself by supporting both bare-metal deployment and hardware emulation, allowing developers

This project is a reference library of firmware examples and a development framework for creating embedded C applications on the RP2040 microcontroller. It provides a collection of hardware peripheral drivers and foundational patterns for managing system resources in resource-constrained environments. The library features reference implementations for programmable I/O state machines, allowing for the creation of custom hardware-level protocols. It also provides a multicore embedded framework to distribute computational workloads across multiple processor cores using symmetric processing. The

This project provides a development framework that enables programming Raspberry Pi Pico microcontrollers using the Arduino environment and standard C++ libraries. It serves as a unified platform for compiling, debugging, and deploying firmware to diverse hardware boards based on the RP2040 and RP2350 architectures. The framework distinguishes itself through native support for symmetric multicore execution, allowing developers to distribute independent tasks across multiple processor cores to manage complex workloads. It also includes a specialized library for USB peripheral emulation, enabli

This project is a collection of minimal operating systems, bootloaders, and hardware drivers used to demonstrate low-level x86 system programming and hardware interfacing. It serves as a kernel development toolkit and a system programming lab designed for testing architecture concepts and hardware behavior within a system emulator. The repository provides reference implementations for creating bootable disk images and loading kernel stages. It includes guides for implementing protected mode transitions, memory paging, interrupt descriptor tables, and symmetric multiprocessing on x86 hardware.

This project consists of technical instructional guides and a structured computer science curriculum designed to teach the construction of a full computing stack from transistors up to a web browser. It provides a 12-week educational course that covers the fundamental domains of computer architecture and digital logic design. The curriculum is distinguished by its first-principles approach, guiding the learner through the engineering of CPUs, FPGAs, and PCBs using digital logic and hardware description languages. It includes specific syllabi for building a hardware design, a TCP/IP network st

Bitwise is a computer architecture education kit and a comprehensive set of guides for building a custom CPU, operating system, and compiler from scratch. It serves as a CPU design tutorial and a practical framework for implementing a unique instruction set architecture. The project provides a custom instruction set architecture toolchain, including resources for creating a matching assembler and compiler. It further includes a hardware development guide for synthesizing computer components and peripheral controllers for deployment on programmable logic devices and FPGAs. The kit covers full

This project provides open-source hardware designs for a high-end, repairable laptop. It defines a modular architecture centered on a precision-milled CNC aluminum chassis and a hardware layout that prioritizes accessibility and user-replaceable parts for long-term maintenance. The design is distinguished by the integration of a 4K AMOLED display and a custom wireless mechanical keyboard utilizing low-profile switches. The system employs a modular approach that allows the input system to be detached and used as a standalone peripheral. The technical scope covers high-performance motherboard

smoltcp is a standalone TCP/IP network stack written in Rust, designed specifically for bare-metal and embedded systems. It provides a memory-safe implementation of the internet protocol suite that operates without requiring dynamic heap allocation. The project is distinguished by its heap-less memory management, using fixed-size buffers and manually allocated memory to ensure deterministic performance. It employs zero-copy packet processing and an interface-based hardware abstraction to decouple the network stack from physical hardware. The stack covers a broad range of networking capabilit

Mezzano is a self-hosted operating system written entirely in Common Lisp. It employs a language-integrated kernel architecture where both the kernel and user-space applications execute within a single, unified high-level language runtime. The system is designed for both bare-metal environments, booting from physical external media, and as a guest operating system within virtual machine software. It implements symmetric multiprocessing to distribute computational workloads across multiple CPU cores. The environment includes capabilities for automated memory recovery via generational garbage

The Espressif SoC Development Framework is a comprehensive toolset for developing, compiling, and flashing applications targeting Espressif system-on-chips. It serves as an embedded toolchain orchestrator and a hardware abstraction layer that simplifies the control of low-level peripherals, memory mapping, and chip-specific registers. The framework provides a dedicated IoT connectivity stack for implementing Wi-Fi, Bluetooth, Zigbee, and Ethernet communication on microcontrollers. It also includes an embedded real-time operating system integration layer to manage multitasking and scheduling o

MicroPython is a lean implementation of Python 3 optimized to run on microcontrollers and other resource-constrained systems. It serves as a cross-platform embedded runtime and hardware abstraction layer, providing a firmware framework that maps high-level software commands to specific microcontroller registers across diverse processor architectures. The project functions as an embedded language interpreter that enables rapid prototyping on hardware through an interactive read-eval-print loop. It supports a wide range of target environments, including ARM, ESP32, STM32, RISC-V, and WebAssembl

Kernel is an educational hobby operating system and low-level systems programming project written in Rust. Designed for students and hobbyists, the project provides a minimalist environment to explore computer architecture, CPU design, and kernel development directly on hardware without relying on a standard library or underlying operating system. The implementation features a freestanding language runtime and a custom target specification that replaces standard library components for bare-metal execution. It includes a multiboot bootloader interface to parse early-boot hardware handoff stat

This project is a bare-metal operating system developed for ARM64 architecture. It serves as a low-level implementation of kernel engineering, focusing on the fundamental construction of an OS from the hardware level up. The system is distinguished by its comprehensive approach to ARM64 processor control, featuring a red-black tree task scheduler and a hierarchical page table system for virtual memory management. It implements a sophisticated privilege model that handles transitions between kernel and user modes, ensuring process isolation through address space splitting and exception level m

Logicanalyzer is a digital logic analyzer and signal visualizer designed for capturing and analyzing high-speed digital signal transitions. It functions as a protocol decoder that translates raw digital signals into human-readable frames and operates as a network capture tool to acquire data remotely over TCP. The system is an extensible protocol analyzer, allowing the development of custom decoders and renderers for proprietary protocols through external libraries. It supports remote hardware capturing via WiFi and provides a mechanism to increase available digital channels through multi-dev

This project is an educational resource for developing bare-metal operating systems and kernels from scratch on Raspberry Pi hardware. It provides a structured guide to systems programming using the Rust language, focusing on the implementation of core kernel components that execute directly on ARM-based hardware without the support of an underlying operating system or standard library. The tutorials emphasize a modular architecture that separates hardware-independent kernel logic from processor-specific and board-specific configurations. By utilizing a hardware abstraction layer and distinct

This project is an embedded C++ development kit and hardware abstraction layer that enables the Arduino programming environment to target ESP8266 WiFi microcontrollers. It provides a comprehensive framework for compiling and flashing code to microcontroller memory via serial or wireless interfaces. The system includes a specialized WiFi microcontroller framework for managing TCP/IP stacks and internet connectivity. It features a dedicated over-the-air firmware update system that allows software updates to be delivered to remote hardware without a physical cable connection. The kit covers emb