s-matyukevich/raspberry-pi-os

Features

• Paged Memory Management - Implements a hierarchical page table system to translate virtual addresses to physical memory and isolate process spaces.
• Bare Metal Development - Implements a complete bare-metal operating system developed specifically for the ARM64 architecture from the hardware level up.
• Hardware Initialization Routines - Sets up the stack pointer and clears the BSS section to prepare the system for main logic.
• Interrupt-Driven Context Switching - Saves and restores processor state registers during exception entry and exit to enable task transitions.
• Balanced Tree Schedulers - Employs a red-black tree to order runnable tasks and efficiently select the next process for execution.
• Interrupt Handlers - Manages hardware interrupt lines by enabling/disabling them and reading pending registers to identify triggering devices.
• Hardware Exception Handlers - Implements a vector table to route hardware interrupts and synchronous exceptions to predefined handler functions.
• ARM64 Kernel Implementations - Implements a bare-metal operating system from the hardware level up specifically for the ARM64 architecture.
• Hardware Drivers - Implements low-level hardware drivers for UART serial communication and system timers via register mapping.
• Boot Protocol Implementations - Ensures the hardware is in a known state by disabling interrupts and the MMU before kernel execution.
• Multicore Boot Coordination - Detects processor IDs during startup to restrict execution to the primary core and idle others.
• Interrupt Handling - Directs hardware interrupts to specific CPU cores or broadcasts them across a multiprocessor system.
• Paging and Context Switching - Manages the saving and restoring of CPU registers and stack pointers during transitions between kernel and user modes.
• Process Schedulers - Manages task switching and process forking to allow multiple execution threads to share a processor.
• Demand Paging - Implements on-demand physical page allocation by detecting translation faults via synchronous exceptions.
• System Memory Allocation - Requests and releases fixed-size memory blocks for task stacks and internal kernel structures.
• Process Address Space Allocation - Reserves physical memory pages and populates page table hierarchies to provide private virtual address spaces for user processes.
• Process Lifecycle Managers - Manages the execution state of processes, including handling zombie states and freeing resources upon termination.
• Task Control Block Management - Tracks process states, priorities, and register values to enable switching between concurrent execution threads.
• Kernel-User Space Splitting - Divides the virtual address space into distinct kernel and user regions to protect memory.
• Process Isolation - Ensures process isolation by running programs at the least privileged exception level.
• System Call Dispatching - Provides a lookup table mechanism to route user-mode requests to specific kernel handler functions.
• Interrupt Vector Handlers - Assigns specific handler functions and IRQ chips to hardware interrupt IDs for signal processing.
• Multicore Processing Initialization - Sets up independent stacks and synchronization for multiple processor cores to enable parallel task execution.
• Address Space Duplication - Creates complete copies of virtual memory and page tables to support the creation of new processes.
• MMU Initialization - Initializes page tables and processor settings to enable the Memory Management Unit during the boot sequence.
• Page Table Initializations - Creates the initial set of page table descriptors during boot to map the kernel image into virtual memory.
• Per-CPU Runqueues - Balances workloads across multiple cores by maintaining independent task queues for each CPU.
• Privilege Level Management - Transitions the processor through various execution levels to manage privilege and access rights.
• Privileged Kernel Operations - Implements the execution of privileged tasks such as memory allocation and thread creation during synchronous exceptions.
• Processor Mode Transitions - Implements transitions between different processor privilege levels using system registers and return instructions.
• Processor Register Configurations - Sets up processor registers, configures endianness, and enables virtualization or host extensions.
• Processor State Preservation - Saves general purpose registers and system state to the stack during exceptions to ensure context restoration.
• System Exception Handling - Captures synchronous exceptions from unauthorized register access and distinguishes them from system calls.
• Entry Points - Defines the exact physical memory location where the CPU starts executing the kernel binary.
• Task Creation - Implements the ability to create new processes and threads by copying or sharing virtual memory and stacks.
• Task Execution Tracking - Tracks runtime statistics and task priorities to determine when a running process should be preempted.
• Task Priority Management - Assigns priority levels to tasks to ensure high-priority processes receive more processor time.
• Task Scheduling Algorithms - Implements a scheduler that identifies the most eligible task to run using virtual runtime algorithms.
• Task Selection Logic - Selects the next process to run based on task state and a priority-weighted counter system.
• Task State Tracking - Tracks essential metadata such as execution state and kernel stack pointers for each task.
• User Process Bootstrapping - Parses binary executables, loads them into memory, and transitions the processor from kernel to user mode.
• Virtual Memory Management - Implements a hierarchical page table structure to translate virtual addresses to physical addresses and isolate process memory.
• Register State Preservation - Saves and restores general purpose register states on the stack to handle interrupts and mode transitions.
• Kernel Schedulers - Features a custom process scheduler using a red-black tree to manage task priorities and context switching.
• System Tick Management - Configures a timer device to generate regular interrupts for uptime tracking and scheduler updates.
• Red-Black Tree Schedulers - Distributes tasks across per-CPU runqueues and utilizes a red-black tree for efficient task selection.
• Hardware Communication - Establishes hardware communication by configuring UART baud rates and selecting active controllers for system output.
• Hardware Timer Controllers - Implements a hardware timer to generate periodic interrupts by comparing system counters against programmed values.
• Serial Communication Interfaces - Configures UART hardware to implement serial communication for system output and character transmission.
• Exception Level Management - Reads system registers to determine the current processor exception level during boot and runtime.
• Executable Program Loading - Reads executable file formats from a file system to load and run user-space applications.
• Floating Point State Management - Saves and restores floating point and SIMD registers during context switches to support advanced calculations.
• Hardware Abstraction Layers - Provides a unified hardware abstraction layer allowing applications to access machine hardware through standardized system calls.
• UART Debugging Interfaces - Provides a formatted print function via UART to display register values and variables for kernel troubleshooting.
• Identity Mappings - Maps virtual addresses to identical physical addresses to allow CPU execution during memory transitions.
• Inter-Core Interrupts - Enables information exchange between processor cores by sending interrupts via hardware mailboxes.
• Interrupt Controllers - Controls the enablement and pending status of interrupts organized into hardware banks via interrupt controllers.
• Interrupt Masking - Sets or clears mask bits to prevent race conditions by controlling the processor's ability to receive asynchronous interrupts.
• Kernel Symbol Resolution - Extracts function and variable addresses from the binary to map memory addresses to human-readable symbols.
• Linker Script Layouts - Uses linker scripts to define the exact physical memory placement of code and data sections for correct booting.
• Linker Script Memory Layouts - Defines the mapping of object files into the output binary to ensure correct boot code placement.
• Large Page Mappings - Maps continuous physical memory in 2 MB sections instead of 4 KB pages to reduce translation table levels.
• MMU Parameter Configuration - Configures the Translation Control Register and Memory Attribute Indirection Register to define page sizes and memory attributes.
• System Time Management - Maintains a tick counter and wall-clock time for scheduling precision and system events.
• User Thread Cloning - Provides the ability to create new user-mode tasks by copying process state and assigning new stacks.
• Hardware Emulators - Supports executing the kernel within a virtualized environment to facilitate development without physical hardware.
• Emulator Porting Layers - Adapts kernel code and hardware access patterns to ensure compatibility with virtualized environments.
• System Emulators - Simulates the boot process and hardware interactions to execute the kernel within a virtual machine.
• Physical Register Mapping - Reads physical base addresses from a device tree to map them into virtual memory regions for hardware driver access.
• Hardware Abstraction Layers - Utilizes a structured device tree format to abstract physical peripheral addresses into virtual memory regions.
• Device Tree Configurations - Utilizes a structured device tree format to define memory maps and peripheral configurations without hardcoded addresses.
• Containers and Virtualization - Operating system development for Raspberry Pi.
• Infrastructure and Systems - A guide to building an OS for Raspberry Pi.
• Operating Systems - Listed in the “Operating Systems” section of the Build Your Own X awesome list.
• Operating Systems and Emulators - A tutorial for building an OS for Raspberry Pi.
• Single Board Computing - Tutorial series for building an OS for Raspberry Pi.

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