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darkriscv is a collection of tools and projects for RISC-V processor implementation, hardware debugging, and automated FPGA synthesis. It provides a hardware design that implements a RISC-V processor core and system components for deployment on programmable logic.
The main features of darklife/darkriscv are: RISC-V ISA Implementations, ISA-to-Hardware Mappings, SoC System Integration, System-on-Chip Integration, Hardware Description Languages, FPGA, Hardware Synthesis Toolchains, Hardware Debuggers.
Open-source alternatives to darklife/darkriscv include: enjoy-digital/litex — LiteX is an FPGA SoC development suite and SoC builder framework used to programmatically design system-on-chips. It… clash-lang/clash-compiler — Clash is a functional hardware compiler and hardware description language compiler that translates strongly typed… apache/nuttx — NuttX is a POSIX-compliant real-time operating system designed for microcontrollers ranging from 8-bit to 64-bit… project-chip/connectedhomeip — This project is an open-source software development kit and framework for implementing the Matter smart home standard.… riscv/riscv-isa-manual — The RISC-V ISA Reference Manual is the official technical specification defining the RISC-V instruction set… atopile/atopile — atopile is an electronic design automation software and hardware description language that enables the definition of…
LiteX is an FPGA SoC development suite and SoC builder framework used to programmatically design system-on-chips. It provides a hardware description toolchain that uses a scriptable framework to define hardware layouts and automate the generation of hardware description language code. The project distinguishes itself by orchestrating multiple vendor and open-source toolchains to synthesize digital logic and generate deployable bitstreams. It supports multi-language logic integration, allowing disparate hardware description languages to be combined into a single project. The framework covers
Clash is a functional hardware compiler and hardware description language compiler that translates strongly typed functional programs written in Haskell into synthesizable VHDL, Verilog, and SystemVerilog code. It serves as a development tool allowing digital designers to write hardware descriptions in functional languages and compile them directly to FPGA targets and physical netlists. The compilation infrastructure covers structural hardware compilation, including graph-based code normalization, functional language translation, and netlist generation. It features type-level clock domain saf
NuttX is a POSIX-compliant real-time operating system designed for microcontrollers ranging from 8-bit to 64-bit architectures. It provides a deterministic execution environment with a real-time task scheduler and a POSIX embedded kernel to ensure portable code execution across diverse hardware targets. The project distinguishes itself through a comprehensive hardware abstraction layer that provides standardized drivers for I2C, SPI, CAN, and USB across various semiconductor chipsets. It also features an embedded networking stack supporting TCP, UDP, IPv4, and IPv6, alongside industrial proto
This project is an open-source software development kit and framework for implementing the Matter smart home standard. It provides a universal IPv6-based application layer and a cluster-based data model to ensure interoperability between diverse smart home devices and controllers. The system is distinguished by its multi-transport network abstraction, which maps Bluetooth LE, Thread, and Wi-Fi implementations to a common layer. It includes specialized tooling for secure device commissioning via QR codes and NFC, as well as a comprehensive over-the-air firmware update system for distributing s