30 open-source projects similar to darklife/darkriscv, ranked by shared indexed features. Tags may describe platforms or build tools rather than the same primary purpose. Check each project’s use case, license, and deployment requirements before treating it as a replacement.
LiteX is an FPGA SoC development suite and SoC builder framework used to programmatically design system-on-chips. It provides a hardware description toolchain that uses a scriptable framework to define hardware layouts and automate the generation of hardware description language code. The project distinguishes itself by orchestrating multiple vendor and open-source toolchains to synthesize digital logic and generate deployable bitstreams. It supports multi-language logic integration, allowing disparate hardware description languages to be combined into a single project. The framework covers
Clash is a functional hardware compiler and hardware description language compiler that translates strongly typed functional programs written in Haskell into synthesizable VHDL, Verilog, and SystemVerilog code. It serves as a development tool allowing digital designers to write hardware descriptions in functional languages and compile them directly to FPGA targets and physical netlists. The compilation infrastructure covers structural hardware compilation, including graph-based code normalization, functional language translation, and netlist generation. It features type-level clock domain saf
NuttX is a POSIX-compliant real-time operating system designed for microcontrollers ranging from 8-bit to 64-bit architectures. It provides a deterministic execution environment with a real-time task scheduler and a POSIX embedded kernel to ensure portable code execution across diverse hardware targets. The project distinguishes itself through a comprehensive hardware abstraction layer that provides standardized drivers for I2C, SPI, CAN, and USB across various semiconductor chipsets. It also features an embedded networking stack supporting TCP, UDP, IPv4, and IPv6, alongside industrial proto
This project is an open-source software development kit and framework for implementing the Matter smart home standard. It provides a universal IPv6-based application layer and a cluster-based data model to ensure interoperability between diverse smart home devices and controllers. The system is distinguished by its multi-transport network abstraction, which maps Bluetooth LE, Thread, and Wi-Fi implementations to a common layer. It includes specialized tooling for secure device commissioning via QR codes and NFC, as well as a comprehensive over-the-air firmware update system for distributing s
The RISC-V ISA Reference Manual is the official technical specification defining the RISC-V instruction set architecture. It serves as a hardware architecture standard and a comprehensive set of rules and definitions that govern the interaction between software and RISC-V hardware. The project is maintained as markdown-based technical documentation, which is converted into a searchable, web-based reference. This specification provides the necessary reference for processor hardware design, low-level firmware development, embedded systems programming, and compiler backend engineering. It inclu
atopile is an electronic design automation software and hardware description language that enables the definition of electronic circuits and components as code. It functions as a modular electronics framework and a compiler that transforms programmatic circuit definitions into a normalized model and KiCad project files for physical layout. The system distinguishes itself through automated hardware design automation, using a constraint-based value solver to calculate required component values and validate electrical specifications during the build process. It employs a modular approach to hard
picorv32 is a size-optimized RISC-V CPU core and synthesizable processor IP designed for integration into FPGA and ASIC hardware designs. It serves as an open-source CPU architecture and embedded system-on-chip component that implements a standard RISC-V instruction set. The design features a modular architecture that allows for the integration of external coprocessors to implement custom non-branching instructions. It includes a parameterized integer unit with configurable multiplication and division cores to balance performance against total logic gate count. The project covers a broad ran
Logisim Evolution is a digital logic simulator and schematic editor used for designing and verifying digital circuits. It functions as a tool for digital circuit design and real-time logic simulation, allowing users to create schematic representations of electronic hardware using gates and registers. The software distinguishes itself by providing hardware description language tools that allow for the definition of custom component behavior and the translation of visual schematics into synthesis-ready code for FPGA hardware deployment. It also serves as a bridge for physical hardware integrati
Chisel is a hardware construction language and description tool used to define digital circuits. It functions as a generator that converts high-level hardware descriptions into synthesizable Verilog code for use in ASIC and FPGA design. The project enables the creation of parameterizable hardware templates and reusable digital components. It leverages functional and object-oriented programming patterns to transform complex circuit representations into finalized hardware descriptions. The toolset covers the register-transfer level design workflow, allowing users to model digital circuits usin
Rocket-chip is a framework for the parametric design, synthesis, and verification of RISC-V based processors and system-on-chip hardware. It functions as a generator that converts high-level specifications into synthesizable Verilog files for FPGA or ASIC implementation. The project utilizes a Scala-based hardware description framework to produce customizable pipelined processor cores, memory hierarchies, and peripheral devices. It employs a parameter-driven model and a two-phase negotiation process to resolve hardware interface specifications between modules during the elaboration phase. Th
This project provides open-source hardware designs for a high-end, repairable laptop. It defines a modular architecture centered on a precision-milled CNC aluminum chassis and a hardware layout that prioritizes accessibility and user-replaceable parts for long-term maintenance. The design is distinguished by the integration of a 4K AMOLED display and a custom wireless mechanical keyboard utilizing low-profile switches. The system employs a modular approach that allows the input system to be detached and used as a standalone peripheral. The technical scope covers high-performance motherboard
probe-rs is an embedded debugging toolset used for flashing, debugging, and inspecting microcontrollers via hardware debug probes. It functions as an embedded firmware flasher, a memory manager for reading and writing to processor registers, and a server implementing the Debug Adapter Protocol to connect hardware debugging to various code editors. The project includes a CMSIS-Pack target parser to extract device metadata and flash configurations from industry-standard definition files. It provides a driver-based probe abstraction to interact with various hardware debug probes regardless of th
Blackmagic is a GDB server for embedded hardware that translates GDB remote protocol messages into JTAG and SWD commands. It functions as an ARM and RISC-V debugger and hardware debug probe manager, enabling users to inspect memory, control execution, and manage registers on ARM Cortex and RISC-V cores. The project distinguishes itself by acting as a remote hardware debugging bridge that can stream GDB server traffic over TCP/IP to control physical hardware from a remote machine. It also provides a JTAG and SWD interface to connect host computers to target hardware and serves as an embedded f
PlatformIO Core is a toolset for embedded software development that manages the compilation, flashing, and debugging of firmware for various microcontroller targets. It provides a cross-platform build system that automates the process of transforming source code into binaries and transferring them to hardware via serial protocols. The system uses a plugin-based architecture to extend hardware platform support and incorporates a manifest-driven approach to resolve and install the specific toolchains, frameworks, and libraries required for different board definitions. Capabilities cover the fu
xemu is a game console emulator and virtual hardware hypervisor designed to execute original Xbox game software on various operating systems. It functions as a disk image player that simulates physical circuitry and storage to enable the playback of original titles. The project includes a suite of low-level system debugging tools for inspecting registers, tracing execution events, and dumping memory from running guest code. It provides specialized capabilities for hardware accuracy testing and game hardware debugging to analyze system behavior. The software covers a broad range of emulation
This project is an open-source computer-aided design toolchain designed for the synthesis, placement, and routing of hardware designs onto programmable logic architectures. It serves as a comprehensive framework for research and development, enabling the transformation of hardware description language designs into optimized netlists and physical implementation files. By providing a modular pipeline, the system facilitates the entire flow from initial logic synthesis to the generation of configuration data for programmable hardware devices. The toolchain distinguishes itself through its focus
PlatformIO is an embedded development platform and cross-platform build system for writing, compiling, and uploading firmware to various microcontroller architectures. It provides a unified environment for managing embedded software development across different hardware platforms. The project functions as an embedded library manager through a centralized registry for discovering and integrating third-party drivers and libraries. It also serves as a firmware debugging tool and an embedded unit testing framework, allowing for real-time hardware inspection and the execution of test suites direct
Vimspector is a visual debugger integration for Vim that enables developers to step through code and inspect program state without leaving the editor. It utilizes the Debug Adapter Protocol to provide a unified interface for debugging multiple programming languages through various debug adapters. The project distinguishes itself by supporting low-level analysis and specialized environments, including bare metal hardware debugging for microcontrollers and the ability to perform disassembly analysis and process memory dumping. It also provides remote debugging capabilities by proxying requests
Digital is a digital logic circuit simulator and hardware design verification tool. It provides a visual environment for designing, testing, and verifying electronic circuits using event-based simulation and automated logic synthesis. The platform functions as a logic synthesis tool that applies boolean algebra to minimize gate configurations and convert truth tables into efficient hardware. It also serves as an HDL export tool, translating visual circuit graphs into VHDL or Verilog code, and as a CPLD deployment tool that generates JEDEC files for flashing programmable logic chips. The soft
stlink is a toolset for ARM Cortex-M flashing, firmware management, and debug server operations, with specific support for STM32 microcontrollers. It provides an ARM Cortex-M flash programmer for writing binary and hex files, an ITM trace logger for real-time instrumentation data, and a SWD/JTAG debug server. The project includes a graphical user interface for managing MCU firmware and exporting memory, as well as a remote server that allows external debuggers to control execution and inspect registers on target hardware. The toolset covers microcontroller memory management through flash era
This project provides an open-source firmware platform and complete build environment for portable multi-tool hardware. It functions as an embedded operating system designed to manage radio, infrared, and physical interface components, enabling users to develop custom applications and system logic for specialized hardware devices. The firmware distinguishes itself through a modular architecture that organizes system functionality into isolated units, allowing for the development of custom user interfaces and logic. It includes a comprehensive collection of low-level drivers and applications s
This project is a custom firmware for the Flipper Zero that provides an embedded plugin ecosystem, a hardware pentesting toolkit, and a multi-protocol emulation layer. It modifies the device's operating system to include a Sub-GHz radio suite for expanded frequency range and the ability to build and deploy third-party applications directly onto the hardware. The firmware extends the device's native capabilities through a Sub-GHz radio suite that allows for frequency extension and signal capture beyond factory defaults. It implements specialized emulation for BadUSB and BLE keyboards and inclu
Arduino CLI is a command line interface for compiling, uploading, and managing libraries and board cores for Arduino-compatible hardware. It functions as a microcontroller toolchain manager and hardware programming tool, providing utilities to discover and install the platform definitions and compilers required for various hardware architectures. The project features an RPC-enabled development daemon that allows external programs to trigger internal tool operations and manage automated electronics workflows programmatically. It also includes an interactive hardware debugger for real-time trou
This project is an Android device farm management platform and mobile device testing lab. It provides a web-based interface for remotely controlling, debugging, and managing fleets of physical Android devices. The platform enables remote hardware access through an ADB remote control system, allowing for remote shell execution, application installation via drag-and-drop, and real-time screen interaction through a browser. It includes tools for mapping remote device connections to local ports, enabling the use of integrated development environments for debugging. The system covers hardware inv
esptool is a Python-based serial utility designed for flashing firmware, configuring hardware fuses, and provisioning Espressif system-on-chip devices. It functions as a serial firmware flasher and hardware provisioning tool that interacts with chips over a serial connection to enable program execution and device setup. The tool provides specialized capabilities for managing Espressif hardware, including the ability to set permanent electronic fuses to lock security settings and define hardware-level configurations. It also features a serial communication bridge that routes network traffic to
Chips is a modular, header-only C library framework designed for building cycle-accurate hardware simulators and replicating historical eight-bit computing architectures. It provides the foundational components necessary to construct complete vintage systems by integrating individual emulated microprocessors and peripheral chips. The framework distinguishes itself through a component-based architecture where hardware modules are implemented as standalone headers that can be wired together to form complex systems. It models hardware interactions at a low level, utilizing pin-level signal emula
This library provides a collection of low-level abstractions for interacting with hardware peripherals on Raspberry Pi devices using the Rust programming language. It serves as a type-safe interface for controlling physical pins and managing communication with external electronic components and sensors. The project distinguishes itself through its use of compile-time abstractions that map high-level function calls directly to hardware instructions, ensuring minimal runtime overhead. It provides consistent access to hardware by wrapping kernel-level device interfaces and memory-mapped register
This project is a software-defined radio platform designed to capture, analyze, and broadcast radio frequency signals across a wide spectrum. It provides a programmable hardware interface for transmitting and receiving radio signals, enabling spectrum analysis and wireless data monitoring. The system is distinguished by its ability to synchronize multiple devices using a shared external clock and hardware triggers to ensure precise timing and sample accuracy. It supports advanced signal routing, allowing ports to be mapped based on frequency or time to enable specialized operations like pseud
Hotspot is a graphical user interface for analyzing and visualizing performance data captured by the Linux perf tool. It functions as a performance profiling visualizer and assembly-level profiler that maps performance costs to specific instructions synchronized with original source code. The project distinguishes itself through a remote symbol resolver that maps performance data from embedded targets to local host debug symbols and sysroots. It also includes a specialized off-CPU analysis tool designed to identify thread wait times and I/O blocks using kernel scheduler tracepoints. The tool
LiteOS is a lightweight real-time operating system kernel designed for constrained devices with limited memory and processing power. It provides a foundation for embedded IoT development, focusing on stable and predictable system resource management. The system implements a preemptive task scheduler and interrupt-driven resource management to ensure real-time responsiveness. It incorporates a tickless idle mechanism and optimized sleep-wake cycles to reduce power consumption in battery-powered hardware. The kernel includes capabilities for task synchronization via semaphores and static memor