SebLague/Digital-Logic-Sim
Digital Logic Sim
Digital-Logic-Sim is a digital logic simulator and interactive circuit designer used for building and simulating digital hardware circuits. It functions as a visual editor and logic state visualizer that allows for the creation of complex digital logic models using logic gates, wires, and custom chips.
The system includes a custom logic chip builder, enabling the grouping of basic logic gates into reusable components to create layered hardware architectures. Users can monitor these designs through a logic state visualizer that displays signal states and memory values using light indicators and hexadecimal formatting.
The software covers circuit design and layout editing with grid snapping, as well as simulation playback control to pause or step through signal transitions. It also provides hardware simulation capabilities such as pulse signal generation and audio signal generation via configurable buzzer components.
Design workflow utilities include a component library management system and undo and redo history to track layout modifications.
Features
- Logic Circuit Simulation - Implements an interactive visual environment for designing and simulating the behavior of digital logic gates and wiring.
- Interactive Logic Design - Provides an interactive wire editing system with grid snapping and point manipulation for designing digital hardware models.
- Computer Architecture - Enables designing and testing basic computer components from the ground up to understand hardware-software interaction.
- Custom Logic Components - Provides a custom logic chip builder to group basic gates into reusable, layered hardware architectures.
- Digital Logic Design Tools - Provides a system for building complex digital systems by connecting logic gates and grouping them into reusable chips.
- Logic Prototype Visualization - Creates visual diagrams of digital circuits with real-time signal states to verify logic before physical implementation.
- Logic State Visualizers - Includes a monitoring interface that displays signal states and memory values using light indicators and hexadecimal formatting.
- Visual Circuit Editors - Ships a visual editor with grid snapping and wire manipulation for building complex digital logic models.
- Cycle-Accurate Execution Models - Implements a simulation engine that tracks hardware operation progression through discrete, cycle-accurate processing steps.
- Hardware Component Reusability - Enables grouping basic logic gates into reusable components to build complex hardware architectures in layers.
- Logic Component Nesting - Allows grouping basic logic gates into reusable chips to build complex hardware architectures in layers.
- Graph Connection Event Systems - Maintains a graph of wires and pins to propagate logic values between interconnected hardware components.
- Circuit Component Placement - Provides tools for the placement of wires, buses, and chips within the design environment.
- Signal Generators - Produces a high output for a set number of cycles whenever an input transitions from low to high.
- Simulation Flow Controllers - Allows users to pause, resume, or advance simulations one step at a time to analyze signal propagation.
- Logic Visualizers - Displays pin and memory values in hexadecimal format to visualize the real-time execution flow and state of logic circuits.
- Design Component Managers - Provides tools to organize logic components into collections for quick retrieval during design.
- Hardware State Indicators - Uses dedicated light indicators to provide immediate visual feedback on the high or low state of signals.
- Grid Snapping - Aligns logic components and wire endpoints to a configurable grid increment for precise visual placement.
- State-Driven Visuals - Updates component colors and labels in real time based on current logic signal levels.
