plaidml/plaidmlArchived
Plaidml
PlaidML is a deep learning compiler framework and cross-platform runtime designed to execute machine learning models on a wide variety of hardware targets. It functions as a hardware agnostic tensor engine that translates tensor models into executable code, allowing deep learning networks to run across different compute devices without requiring specific driver dependencies.
The system enables the execution of models on custom or limited hardware by using JSON specifications to define device hardware. It employs a domain-specific language to describe tensor computations and provides a middle layer to integrate various machine learning frameworks with its hardware-targeting compiler.
The engine supports a range of tensor operations, including tensor contractions with index constraints, multi-dimensional convolutions with configurable strides and padding, and elementwise operations using broadcasting. It also includes a testing suite to benchmark execution speed and efficiency across different hardware components and environments.
Features
- Cross-Platform Model Execution - Runs machine learning models across different hardware targets and operating systems to verify correctness and measure performance.
- Cross-Platform Runtimes - Provides a software layer that enables consistent model execution across diverse hardware architectures using JSON specifications.
- Backend-Agnostic Deep Learning - Executes deep learning models across diverse hardware targets without requiring vendor-specific drivers or software.
- Framework-Agnostic Backends - Acts as a framework-agnostic backend that connects various machine learning frameworks to a universal hardware-targeting compiler.
- Model Compilers - Transforms high-level neural network definitions into optimized, hardware-specific executable code.
- Hardware Acceleration - Utilizes specialized hardware components and custom specifications to enhance computational throughput for machine learning tasks.
- Backend-Agnostic Engines - Decouples neural network operations from specific hardware backends to enable cross-platform execution without driver dependencies.
- JSON Device Specifications - Defines hardware specifications in JSON files to allow model execution on devices without native software support.
- Device Support Specifications - Defines device specifications in JSON files to run models on hardware with limited or custom software support.
- AOT Deep Learning Compilers - Translates neural network graphs into standalone native code for efficient hardware-targeted inference.
- Tensor Operation Definitions - Provides a domain-specific language to describe tensor computations that are subsequently converted into hardware-specific implementations.
- Hardware-Targeted Compilation - Translates high-level tensor networks into executable code optimized for the specific constraints of chosen hardware targets.
- Deep Learning Execution - Executes tensor networks and deep learning models across diverse hardware targets to verify correctness and performance.
- Configurable Convolutions - Constructs multi-dimensional convolutions using configurable strides, dilation rates, padding, and grouping.
- Neural Network Operations - Defines mathematical operations and transformations used within neural network layers.
- ML Framework Integrations - Connects tensor compilers to various machine learning frameworks to enable execution across diverse hardware targets.
- Tensor Broadcasting - Implements mechanisms for performing element-wise operations on tensors with different shapes through automatic broadcasting.
- Index Range Constraints - Restricts the range of index variables during tensor contractions to implement pooling or cumulative sums.
- Tensor Contractions - Aggregates values across tensor indices using sum, max, min, or product operations to reduce dimensionality.
- Index-Constrained Contractions - Reduces tensor dimensionality by aggregating values across indices while applying specific range constraints for pooling and sums.
- Tensor Operations - Performs mathematical functions and binary operators on tensor elements using broadcasting for mismatched shapes.
- Tensor Network Executors - Implements a tensor engine for performing contractions and elementwise operations on diverse hardware.
- Hardware Performance Benchmarking - Compares execution speed and efficiency across different hardware components and environments using a dedicated testing suite.
