3 Repos
Alignment of memory allocations to byte boundaries to optimize CPU vector instructions.
Distinct from Memory Allocators: Distinct from general memory allocators: specifically targets byte alignment for SIMD/vector efficiency.
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Highway is a portable C++ library and hardware abstraction layer designed for writing single instruction multiple data (SIMD) code. It provides a unified interface that maps data-parallel logic to various CPU instruction sets, enabling the development of high-performance software that runs across different processor architectures without requiring architecture-specific assembly. The project features a dynamic instruction dispatcher that selects the most efficient CPU instruction set at runtime based on detected hardware. It also supports static target specialization and extensible mechanisms
Includes a memory manager for aligned allocation and masked load-store operations to optimize vector processing.
Magnum is a C++ middleware suite for cross-platform graphics development and real-time data visualization. It provides a hardware-agnostic rendering layer that translates graphics commands into platform-specific calls, ensuring consistent behavior across different GPU drivers and APIs such as Vulkan. The project focuses on decoupling application logic from underlying hardware through abstract graphics and system utilities. It features a plugin-based resource importer for 3D assets and audio, a hierarchical scene graph for spatial transformations, and a high-performance signal-based event syst
Aligns memory blocks to specific boundaries to optimize SIMD and vector instruction performance.
This project is a parallel simulation engine and molecular dynamics simulator designed to model the physical movements of atoms and molecules. It functions as an interatomic potential framework for calculating forces between particles and a materials analysis tool for computing thermodynamic, structural, and transport properties of solids and fluids. The engine is distinguished by its high-performance computing capabilities, utilizing spatial-domain decomposition and message-passing interface communication to distribute workloads across processors. It supports multi-backend GPU acceleration v
Allocates large memory chunks on specific byte boundaries to improve the efficiency of CPU vector instructions.