Open-source alternatives to Logisim Evolution

This project consists of technical instructional guides and a structured computer science curriculum designed to teach the construction of a full computing stack from transistors up to a web browser. It provides a 12-week educational course that covers the fundamental domains of computer architecture and digital logic design. The curriculum is distinguished by its first-principles approach, guiding the learner through the engineering of CPUs, FPGAs, and PCBs using digital logic and hardware description languages. It includes specific syllabi for building a hardware design, a TCP/IP network st

LiteX is an FPGA SoC development suite and SoC builder framework used to programmatically design system-on-chips. It provides a hardware description toolchain that uses a scriptable framework to define hardware layouts and automate the generation of hardware description language code. The project distinguishes itself by orchestrating multiple vendor and open-source toolchains to synthesize digital logic and generate deployable bitstreams. It supports multi-language logic integration, allowing disparate hardware description languages to be combined into a single project. The framework covers

GoJS is a JavaScript diagramming library and canvas-based visualization engine used to build interactive flowcharts, organizational charts, and network diagrams. It functions as a data-driven framework that binds JavaScript data models to visual elements, enabling bidirectional synchronization between the underlying data and the graphical representation. The library features a comprehensive graph layout engine capable of automatically arranging nodes into trees, grids, circles, or force-directed layouts. It distinguishes itself through a template-based system for generating visual parts and a

Logicanalyzer is a digital logic analyzer and signal visualizer designed for capturing and analyzing high-speed digital signal transitions. It functions as a protocol decoder that translates raw digital signals into human-readable frames and operates as a network capture tool to acquire data remotely over TCP. The system is an extensible protocol analyzer, allowing the development of custom decoders and renderers for proprietary protocols through external libraries. It supports remote hardware capturing via WiFi and provides a mechanism to increase available digital channels through multi-dev

atopile is an electronic design automation software and hardware description language that enables the definition of electronic circuits and components as code. It functions as a modular electronics framework and a compiler that transforms programmatic circuit definitions into a normalized model and KiCad project files for physical layout. The system distinguishes itself through automated hardware design automation, using a constraint-based value solver to calculate required component values and validate electrical specifications during the build process. It employs a modular approach to hard

Yosys is a digital logic synthesizer and RTL synthesis tool that transforms hardware description language code into optimized gate-level representations. It functions as a hardware logic optimizer and formal verification tool, providing a framework to convert generic circuit representations into specific technology library cells for targeted hardware platforms. The project serves as a hardware design automator through a scriptable environment used to execute sequences of synthesis commands. This automation allows for the management of complex digital hardware workflows, integrating RTL design

This project is an open-source computer-aided design toolchain designed for the synthesis, placement, and routing of hardware designs onto programmable logic architectures. It serves as a comprehensive framework for research and development, enabling the transformation of hardware description language designs into optimized netlists and physical implementation files. By providing a modular pipeline, the system facilitates the entire flow from initial logic synthesis to the generation of configuration data for programmable hardware devices. The toolchain distinguishes itself through its focus

Computerraria is a digital logic circuit simulator and computer architecture educational tool. It provides a sandbox environment for building and testing functional computer systems by connecting modular logic gates and electronic wires. The project serves as a RISC-V architecture simulator that executes RV32I machine code using virtualized hardware components. It includes a virtualized CPU toolchain that uses containerized systems to compile source code into binary formats compatible with these custom processor architectures. The system covers digital logic circuit design and RISC-V ISA sim

Godot is a comprehensive, node-based game engine designed for building interactive 2D and 3D applications. It provides an integrated development environment that utilizes a hierarchical scene system to organize objects, propagate spatial transformations, and manage lifecycle events. The engine functions as a cross-platform development suite, allowing developers to author, test, and export software to desktop, mobile, and web environments from a single, unified codebase. The engine distinguishes itself through a modular, component-based architecture that relies on signals-based decoupling for

The Powder Toy is a physics sandbox simulator and programmable logic simulator. It provides a real-time environment for modeling the interactions of solids, liquids, and gases using a particle physics engine that calculates movement, heat transfer, and pressure on a 2D grid. The system is a scriptable simulation environment that supports custom plugins and scripting to automate workflows. It allows for the construction of functional electronic circuits and complex machines using integrated materials and conductive elements. The software covers environmental dynamics modeling and material int

Bitwise is a computer architecture education kit and a comprehensive set of guides for building a custom CPU, operating system, and compiler from scratch. It serves as a CPU design tutorial and a practical framework for implementing a unique instruction set architecture. The project provides a custom instruction set architecture toolchain, including resources for creating a matching assembler and compiler. It further includes a hardware development guide for synthesizing computer components and peripheral controllers for deployment on programmable logic devices and FPGAs. The kit covers full

This repository is a comprehensive collection of functional 2D and 3D demo projects and implementation samples for the Godot Game Engine. It serves as an interactive tutorial and reference library, providing a working codebase to demonstrate how to apply engine features in real-world scenarios. The collection focuses on practical implementation guides, covering a wide array of technical capabilities from basic engine fundamentals to advanced rendering and scripting techniques. It allows users to study the application of node-based composition, asset pipelines, and game logic through direct ex

darkriscv is a collection of tools and projects for RISC-V processor implementation, hardware debugging, and automated FPGA synthesis. It provides a hardware design that implements a RISC-V processor core and system components for deployment on programmable logic. The project includes a hardware debugger with a command-line interface for verifying processor state by manipulating registers and dumping memory on a hardware target. It also features a set of scripts and project files to automate the synthesis and programming of hardware designs within a Linux environment. The codebase covers har

GHDL is a compiler and simulator for VHDL hardware descriptions. It functions as a multi-pass analysis elaborator that resolves design hierarchies and dependencies to prepare hardware descriptions for simulation or synthesis. The project transforms VHDL source code into executable binaries for high-speed digital design verification and serves as a synthesis tool that converts descriptions into structural netlists compatible with vendor or open-source flows. It also implements the Language Server Protocol to provide static analysis, autocomplete, and code navigation for VHDL files. The toolse

Redot Engine is a multi-platform 2D and 3D game engine that provides a unified editor interface for creating and publishing games across desktop, mobile, web, and console platforms. At its core, the engine uses a scene tree node architecture where game objects are organized hierarchically, with each node inheriting transforms and properties from its parent, and a scriptable node system that allows attaching GDScript, C#, or VisualScript code directly to nodes for custom behavior without recompiling. The engine distinguishes itself through an editor-embedded runtime that runs the game inside t

QWidgetDemo is a collection of reusable GUI components, layout templates, and a desktop UI framework built with the Qt framework. It functions as a component library for creating modern graphical user interfaces, ranging from system event managers and network debugging toolsets to multi-channel video dashboards. The project focuses on creating specialized user interface elements, including frameless windows, flat design aesthetics, and custom themes. It provides the means to implement specialized controls such as battery indicators, resource monitors, and IP address inputs. Its capabilities

This project is a technical library and knowledge base for the Qt framework, serving as a C++ GUI programming guide and a resource for cross-platform development. It provides a collection of technical guides, best practices, and instructional materials focused on building applications using the Qt ecosystem. The repository focuses on optimizing application performance and development workflows. It covers architectural patterns for improving build speeds and execution efficiency, including the use of in-memory databases and asynchronous function calls. It also offers specialized guidance on in

Rocket-chip is a framework for the parametric design, synthesis, and verification of RISC-V based processors and system-on-chip hardware. It functions as a generator that converts high-level specifications into synthesizable Verilog files for FPGA or ASIC implementation. The project utilizes a Scala-based hardware description framework to produce customizable pipelined processor cores, memory hierarchies, and peripheral devices. It employs a parameter-driven model and a two-phase negotiation process to resolve hardware interface specifications between modules during the elaboration phase. Th

XiangShan is a high-performance RISC-V processor core and a hardware description language framework. It provides a construction-based system for designing, simulating, and verifying complex processor micro-architectures and peripheral devices. The project includes a high-performance CPU simulator used for architectural exploration and functional verification of processor execution. The project implements a superscalar out-of-order CPU architecture that uses renaming and reorder buffers to execute instructions in parallel. It generates synthesizable Verilog files from hardware descriptions to

OpenRGB is a centralized software suite for controlling colors and lighting effects across various brands of RGB hardware. It functions as a cross-platform controller and hardware control system that provides a unified interface for managing lighting profiles and effects. The project features an extensible plugin framework and a dedicated plugin interface that allow for the addition of new hardware support and integration features. It includes a network gateway that exposes an API for third-party applications to send lighting commands to connected devices. The system supports multi-computer

picorv32 is a size-optimized RISC-V CPU core and synthesizable processor IP designed for integration into FPGA and ASIC hardware designs. It serves as an open-source CPU architecture and embedded system-on-chip component that implements a standard RISC-V instruction set. The design features a modular architecture that allows for the integration of external coprocessors to implement custom non-branching instructions. It includes a parameterized integer unit with configurable multiplication and division cores to balance performance against total logic gate count. The project covers a broad ran

The Open-Source Rover Platform is a hardware and software framework for building and controlling six-wheel planetary exploration rovers. It provides a six-wheel robot chassis and a modular robotics framework designed for integrating various motors, wheel sizes, and chassis materials. The platform features a six-wheel chassis equipped with a differential pivot suspension and an Ackerman steering mechanism to enable navigation across rugged outdoor terrain. Control is managed through a communication system that connects central processors to hardware via Bluetooth, WiFi, or USB for remote opera

This project is flight control autopilot software designed as a real-time operating system for managing the flight dynamics and navigation of autonomous multicopters, fixed-wing aircraft, and rovers. It serves as a multi-vehicle autopilot framework that supports various aircraft configurations, including vertical takeoff and landing platforms across industrial environments. The system includes a MAVLink communication stack for exchanging telemetry and command data between unmanned vehicles and ground control stations. It also provides a software-in-the-loop flight simulator to test autopilot

blinker-nRF52 is a firmware software development kit for building Bluetooth Low Energy and Mesh applications on Nordic nRF52 hardware. It serves as a wrapper for the nRF5 and nRF5 Mesh SDKs, providing a communication layer to organize devices into mesh networks and a system for secure over-the-air firmware updates. The project enables the delivery of encrypted system images wirelessly to update device software. It facilitates the organization of multiple nodes into a relayed network to distribute control commands and upload status updates. The toolkit covers hardware integration for Nordic s

PyQtGraph is a scientific plotting and graphics framework built for PyQt and PySide applications, providing fast, interactive 2D and 3D visualizations with GPU-accelerated rendering. It serves as both a real-time signal monitoring system for streaming time-series data and a toolkit for constructing interactive data dashboards with dockable panels, parameter trees, and custom widgets. The library also includes a node-based visual flowchart tool for building data processing pipelines and a scientific graphics export system that saves plots as PNG, SVG, or CSV and converts items to Matplotlib for

This project is a Node.js WebSocket library that provides a high-performance client and server implementation for the WebSocket protocol. It functions as a transport layer for real-time bidirectional communication, supporting both UTF-8 strings and binary data transport through the use of TCP socket wrappers. The library enables the creation of WebSocket servers that manage full-duplex connections and broadcast messages to multiple clients, as well as WebSocket clients that establish persistent links to remote servers. It handles the protocol upgrade process via TCP-based handshake negotiatio