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Awesome GitHub RepositoriesCache-Aware Memory Access

Aligns data structures and access patterns to hardware cache lines to prevent performance degradation from frequent main memory fetches.

Distinct from Memory Access Profilers: Distinct from Memory Access Profilers: focuses on active data alignment and access pattern optimization rather than passive profiling.

Explore 13 awesome GitHub repositories matching software engineering & architecture · Cache-Aware Memory Access. Refine with filters or upvote what's useful.

Awesome Cache-Aware Memory Access GitHub Repositories

اعثر على أفضل المستودعات باستخدام الذكاء الاصطناعي.سنبحث عن أفضل المستودعات المطابقة باستخدام الذكاء الاصطناعي.
  • lemire/simdjsonالصورة الرمزية لـ lemire

    lemire/simdjson

    23,860عرض على GitHub↗

    simdjson is a high-performance JSON parser that utilizes SIMD instructions to process gigabytes of data per second. It functions as a SIMD JSON parser, a multithreaded NDJSON processing library, a UTF-8 validation engine, and a tool for JSON minification and string building. The project focuses on high-throughput data processing, enabling the ingestion of massive JSON volumes and the verification of UTF-8 encoding standards. It includes dedicated capabilities for constructing JSON strings with optimized memory usage and removing unnecessary whitespace from documents to reduce file size. The

    Allocates extra space at the end of buffers to allow wide SIMD loads without memory access violations.

    C++
    عرض على GitHub↗23,860
  • lmax-exchange/disruptorالصورة الرمزية لـ LMAX-Exchange

    LMAX-Exchange/disruptor

    18,375عرض على GitHub↗

    The Disruptor is a lock-free inter-thread messaging library and high-performance event bus. It implements a concurrent ring buffer designed for high-concurrency and low-latency message sequencing. The project utilizes a specific messaging architecture to eliminate lock contention, enabling high-throughput event routing and the exchange of continuous event streams between threads. It ensures strict first-in-first-out ordering and immediate data visibility across processing threads. The library provides capabilities for lock-free data streaming, sequential data ordering, and sequence-based eve

    Implements cache-line padding to eliminate false sharing and maximize CPU cache efficiency.

    Javaconcurrencydisruptorjava
    عرض على GitHub↗18,375
  • ffmpeg/asm-lessonsالصورة الرمزية لـ FFmpeg

    FFmpeg/asm-lessons

    12,067عرض على GitHub↗

    This project serves as an educational resource for learning and implementing low-level assembly language optimizations. It provides a structured guide for developers to master hardware-specific instructions and manual performance tuning, focusing on the translation of high-level code into efficient machine-level operations for resource-constrained environments. The materials emphasize techniques for maximizing computational throughput in multimedia processing. By covering instruction-level parallelism, register management, and data parallelism, the project enables the development of software

    Aligns data structures and access patterns to hardware cache lines to prevent performance degradation from frequent main memory fetches.

    عرض على GitHub↗12,067
  • dgryski/go-perfbookالصورة الرمزية لـ dgryski

    dgryski/go-perfbook

    10,902عرض على GitHub↗

    This project is a collection of educational resources and technical guides focused on Go performance optimization. It provides instruction on improving execution speed and reducing memory usage through code and architectural refinements. The guides cover advanced strategies for low-level programming, including the use of assembly for SIMD instructions and unsafe pointers for direct memory manipulation. It also details concurrency optimization techniques such as lock sharding and cache-line padding to reduce contention and improve hardware utilization. The material encompasses broad capabilit

    Implements cache-line padding to prevent false sharing and reduce CPU cache coherence traffic.

    optimizationperformanceperformance-analysis
    عرض على GitHub↗10,902
  • cyan4973/xxhashالصورة الرمزية لـ Cyan4973

    Cyan4973/xxHash

    10,885عرض على GitHub↗

    xxHash is a high-performance, non-cryptographic hash library designed for rapid checksum generation and data integrity verification. It functions as an incremental hashing engine, allowing for the processing of large or streaming data inputs by maintaining a persistent internal state across sequential chunks. The library is engineered as a computational framework that maximizes throughput by utilizing wide CPU registers and branchless instruction pipelining. It achieves high-speed performance by aligning data access with CPU cache lines and employing multi-stage mixing functions that ensure c

    Optimizes memory throughput by structuring data access patterns to fit within the CPU cache lines for faster retrieval.

    Ccdispersionhash
    عرض على GitHub↗10,885
  • deepseek-ai/deepepالصورة الرمزية لـ deepseek-ai

    deepseek-ai/DeepEP

    9,736عرض على GitHub↗

    DeepEP is a distributed model accelerator and expert-parallel communication library designed to optimize the training and inference of large-scale neural networks. It provides specialized GPU communication kernels and a remote GPU memory interface to facilitate high-throughput data exchange between hardware nodes. The system utilizes dynamic kernel generation to compile optimized GPU kernels during execution, removing the need for separate installation compilation steps. It implements virtual-lane traffic isolation to prevent interference between different data streams and employs routing met

    Utilizes low-level memory primitives to coordinate distributed parallelism and optimize hardware resource usage.

    Cuda
    عرض على GitHub↗9,736
  • baidu/uid-generatorالصورة الرمزية لـ baidu

    baidu/uid-generator

    5,572عرض على GitHub↗

    هذا المشروع عبارة عن مولد معرفات فريدة موزع مصمم لإنتاج معرفات فريدة عالميًا وقابلة للفرز بحجم 64 بت عبر عقد متعددة. ينفذ خوارزمية متوافقة مع Snowflake تمنع التصادمات من خلال الجمع بين الطوابع الزمنية، ومعرفات العامل، وأرقام التسلسل في عدد صحيح واحد. يتضمن النظام منسق معرف العامل لتخصيص والحفاظ على هويات الجهاز الفريدة أثناء بدء تشغيل المثيل والترحيل باستخدام استراتيجيات مدعومة بقاعدة بيانات. لزيادة إنتاجية الطلبات وتقليل التأخير، يستخدم طبقة تخزين مؤقت بحلقة (Ring-buffer) تقوم بتوليد المعرفات مسبقًا وتستخدم آلية إعادة تعبئة قائمة على العتبة. يوفر البرنامج قدرات لإدارة مفاتيح قاعدة البيانات الموزعة، وتنسيق عقد النظام، وتكوين توزيع البتات لموازنة احتياجات التزامن مقابل عمر النظام. كما يتضمن أدوات لتحليل المعرفات المولدة مرة أخرى إلى مكوناتها الأصلية.

    Employs cache-line padding between buffer elements to eliminate false sharing and increase hardware throughput.

    Java
    عرض على GitHub↗5,572
  • p-h-c/phc-winner-argon2الصورة الرمزية لـ P-H-C

    P-H-C/phc-winner-argon2

    5,309عرض على GitHub↗

    هذا تنفيذ تشفيري لدالة Argon2 المعتمدة على الذاكرة (memory-hard)، وتعمل كمكتبة لتجزئة كلمات المرور ودالة لاشتقاق المفاتيح. تقوم بتحويل كلمات المرور والأملاح (salts) إلى تجزئات آمنة وتوليد مفاتيح تشفير مصممة لمقاومة هجمات كسر الأجهزة عالية السرعة. تستخدم المكتبة تصميماً يعتمد على الذاكرة يتطلب ذاكرة وصول عشوائي (RAM) كبيرة لمنع التسريع عبر وحدات معالجة الرسومات (GPUs) أو الدوائر المتكاملة الخاصة بالتطبيقات (ASICs). تدمج وصولاً للذاكرة مستقلاً عن البيانات لمنع هجمات التوقيت الجانبية (side-channel timing attacks) وتدعم دمج المفاتيح السرية أو الـ peppers للحماية من هجمات القوة الغاشمة على الأملاح المخترقة. تشمل القدرات الإضافية ترميز تجزئة كلمة المرور للتخزين والنقل، والقدرة على ربط التجزئات ببيانات سياق محددة، وإدارة آمنة للذاكرة تقوم بمسح المخازن المؤقتة الحساسة فور الاستخدام.

    Employs data-independent memory access patterns to block side-channel timing attacks.

    C
    عرض على GitHub↗5,309
  • parallel101/courseالصورة الرمزية لـ parallel101

    parallel101/course

    4,166عرض على GitHub↗

    This project is a technical curriculum and set of educational resources focused on parallel programming, high-performance computing, and systems programming. It provides a structured course covering the implementation of parallel algorithms and multithreading techniques for processing large datasets. The project includes a systems programming guide for modern language features, a framework for lock-free concurrency patterns, and a manual for optimizing CPU and GPU performance through assembly analysis and cache management. The material covers hardware performance tuning, the implementation o

    Provides techniques for aligning data structures and access patterns to maximize CPU cache hits.

    C++coursecppcpp17
    عرض على GitHub↗4,166
  • cch123/golang-notesالصورة الرمزية لـ cch123

    cch123/golang-notes

    4,032عرض على GitHub↗

    هذا المشروع عبارة عن مرجع تقني ومجموعة من ملاحظات التحليل الداخلي التي تركز على وقت تشغيل لغة Go والمترجم. يوفر تفصيلاً دقيقاً للغة من الداخل، ويغطي إدارة الذاكرة، وجمع القمامة، ونموذج تنفيذ المجدول. تتميز المادة بتوفير غوص عميق في تفاصيل النظام منخفضة المستوى، بما في ذلك مرجع لتعليمات تجميع Go، واستخدام السجلات، وواجهة استدعاء النظام. ويحلل بشكل خاص التنفيذ الداخلي لبدائيات التزامن، مثل آلية جدولة الروتينيات (goroutine)، وعمليات القنوات، وتنفيذ قفل الميوتكس (mutex). يمتد التغطية إلى نظرية بناء المترجم، بما في ذلك التحليل المعجمي والنحوي، بالإضافة إلى آليات نظام النوع وإدارة الواجهة. كما يفصل تقنيات تحسين الأداء المختلفة، وأدوات تشخيص وقت التشغيل لتتبع المكدس، وبدائيات إدخال/إخراج الشبكة.

    Details the use of padding bytes to prevent CPU cache coherence traffic caused by false sharing.

    HTMLcodegogolang
    عرض على GitHub↗4,032
  • jctools/jctoolsالصورة الرمزية لـ JCTools

    JCTools/JCTools

    3,851عرض على GitHub↗

    JCTools is a Java concurrency library providing a collection of lock-less and wait-free data structures. It serves as a toolkit for managing thread-safe data exchange, specifically designed to optimize high-throughput messaging and producer-consumer patterns in multi-threaded applications. The library distinguishes itself by implementing specialized queue structures that minimize contention and maximize throughput. By utilizing techniques such as cache-line padding, memory-barrier-based synchronization, and relaxed-consistency memory ordering, it avoids the performance bottlenecks often assoc

    Aligns data structures to CPU cache lines to prevent false sharing and performance degradation in concurrent environments.

    Javaawesomebenchmarksconcurrency
    عرض على GitHub↗3,851
  • dendibakh/perf-ninjaالصورة الرمزية لـ dendibakh

    dendibakh/perf-ninja

    3,754عرض على GitHub↗

    perf-ninja is a collection of educational resources and curricula focused on CPU architecture, memory hierarchies, SIMD programming, and low-level performance engineering. It provides instructional material and practical labs for identifying and fixing CPU bottlenecks, such as cache misses and branch mispredictions. The project differentiates itself through specialized training in hardware-level optimizations, including the use of compiler intrinsics for SIMD vectorization and the implementation of branchless predicate execution to eliminate pipeline stalls. It also covers advanced binary-lev

    Teaches how to align data structures to cache line boundaries and implement loop tiling to minimize cache misses.

    C++
    عرض على GitHub↗3,754
  • open-quantum-safe/liboqsالصورة الرمزية لـ open-quantum-safe

    open-quantum-safe/liboqs

    2,979عرض على GitHub↗

    Liboqs is a C library that provides a unified interface for quantum-resistant cryptographic algorithms, including key encapsulation and digital signature mechanisms. It is designed to facilitate the integration of post-quantum security into existing protocols and applications, ensuring data protection against future threats from large-scale quantum computers. The library distinguishes itself through a focus on high-assurance implementations and side-channel resistance, utilizing constant-time primitives to prevent timing-based information leakage. It offers extensive build-time configuration,

    Implements constant-time memory access patterns to prevent timing-based side-channel information leakage.

    Ccryptographykey-exchange-algorithmslattice-based-crypto
    عرض على GitHub↗2,979
  1. Home
  2. Software Engineering & Architecture
  3. Shared Memory Management
  4. Memory Access Profilers
  5. Cache-Aware Memory Access

استكشف الوسوم الفرعية

  • Constant-Time Memory AccessMemory access patterns that do not depend on secret data to prevent side-channel timing attacks. **Distinct from Cache-Aware Memory Access:** Distinct from cache-aware access by focusing on security and timing-attack prevention rather than performance optimization.
  • NUMA OptimizationsMemory access strategies that account for Non-Uniform Memory Access architectures to reduce remote memory requests. **Distinct from Cache-Aware Memory Access:** Specifically targets NUMA topology for latency reduction, whereas Cache-Aware Memory Access focuses on cache line alignment.
  • SIMD Buffer Padding1 وسم فرعيMemory allocation strategies that ensure buffers have trailing padding to support wide vector loads. **Distinct from Cache-Aware Memory Access:** Distinct from general cache-aware access: specifically addresses the padding requirement for SIMD memory safety.
  • Software PrefetchingTechniques for explicitly instructing the CPU to load data into the cache before it is needed. **Distinct from Cache-Aware Memory Access:** Distinct from Cache-Aware Memory Access: focuses on active preloading of addresses rather than static alignment or layout.