Awesome GitHub RepositoriesMemory Access Profilers

simdjson is a high-performance JSON parser that utilizes SIMD instructions to process gigabytes of data per second. It functions as a SIMD JSON parser, a multithreaded NDJSON processing library, a UTF-8 validation engine, and a tool for JSON minification and string building. The project focuses on high-throughput data processing, enabling the ingestion of massive JSON volumes and the verification of UTF-8 encoding standards. It includes dedicated capabilities for constructing JSON strings with optimized memory usage and removing unnecessary whitespace from documents to reduce file size. The

Triton is a parallel computing framework and high-level programming language designed for writing custom compute kernels. It functions as a deep learning compiler, translating complex mathematical operations into high-throughput instructions that maximize hardware utilization and memory efficiency on graphics processing units. The framework distinguishes itself through a hardware-agnostic compute abstraction that allows developers to define kernels without manual low-level tuning. It employs just-in-time compilation to generate optimized binary instructions at runtime, utilizing static data f

FlameGraph is a performance profiling and visualization toolkit designed to identify bottlenecks in software execution. It functions as a processing engine that transforms raw stack trace samples into interactive, hierarchical diagrams. By representing aggregated execution frequency as nested rectangles, the tool allows developers to visualize hot code paths and analyze system behavior across both kernel and user-space environments. The project distinguishes itself through its ability to perform differential profile analysis, which highlights performance regressions or improvements by compari

The Disruptor is a lock-free inter-thread messaging library and high-performance event bus. It implements a concurrent ring buffer designed for high-concurrency and low-latency message sequencing. The project utilizes a specific messaging architecture to eliminate lock contention, enabling high-throughput event routing and the exchange of continuous event streams between threads. It ensures strict first-in-first-out ordering and immediate data visibility across processing threads. The library provides capabilities for lock-free data streaming, sequential data ordering, and sequence-based eve

TinyGo is a specialized compiler and development toolkit designed to bring the Go programming language to resource-constrained microcontrollers and WebAssembly environments. It provides a bare-metal runtime environment that enables high-level code execution without the need for a traditional operating system, utilizing an LLVM-based backend to generate efficient machine instructions. The project distinguishes itself through aggressive optimization techniques tailored for small hardware, including a static memory allocation strategy and whole-program dead code elimination that significantly re

AISystem is a comprehensive AI full-stack infrastructure project covering the entire pipeline from AI chip architecture to high-level training frameworks. It encompasses the development of AI compiler frameworks, inference engines, and distributed training orchestrators designed to coordinate workloads across a heterogeneous compute stack of CPUs, GPUs, and NPUs. The project focuses on the deep integration of software and hardware, employing software-hardware co-design to align tensor layouts with physical memory structures. It provides specialized capabilities for accelerating Transformer mo

This project is a comprehensive educational resource and programming course covering C++ language semantics and features from C++03 through C++26. It provides structured tutorials and technical guides focused on modern C++ development. The material offers specialized instruction on template metaprogramming, including the use of type traits and compile-time computations. It features detailed guides on concurrency and parallelism for multi-core execution, as well as a reference for software design applying SOLID principles and RAII. Additionally, it covers build performance optimization to redu

This project serves as an educational resource for learning and implementing low-level assembly language optimizations. It provides a structured guide for developers to master hardware-specific instructions and manual performance tuning, focusing on the translation of high-level code into efficient machine-level operations for resource-constrained environments. The materials emphasize techniques for maximizing computational throughput in multimedia processing. By covering instruction-level parallelism, register management, and data parallelism, the project enables the development of software

This project is a collection of educational resources and technical guides focused on Go performance optimization. It provides instruction on improving execution speed and reducing memory usage through code and architectural refinements. The guides cover advanced strategies for low-level programming, including the use of assembly for SIMD instructions and unsafe pointers for direct memory manipulation. It also details concurrency optimization techniques such as lock sharding and cache-line padding to reduce contention and improve hardware utilization. The material encompasses broad capabilit

xxHash is a high-performance, non-cryptographic hash library designed for rapid checksum generation and data integrity verification. It functions as an incremental hashing engine, allowing for the processing of large or streaming data inputs by maintaining a persistent internal state across sequential chunks. The library is engineered as a computational framework that maximizes throughput by utilizing wide CPU registers and branchless instruction pipelining. It achieves high-speed performance by aligning data access with CPU cache lines and employing multi-stage mixing functions that ensure c

This project is a specialized toolset for profiling kernel latency, analyzing tracepoint frequency, and monitoring system-wide performance data. It functions as a kernel performance profiler, tracepoint analyzer, and a collection of utilities for the Linux ftrace and perf_events subsystems. The toolkit provides high-level abstractions via shell-scripted wrappers to manage complex kernel tracing interfaces. It distinguishes itself through the use of bucket-based event histograms to visualize the distribution of kernel events and the ability to identify functions exceeding specific latency thre

Cutlass is a collection of C++ templates and Python interfaces for implementing high-performance linear algebra operations on NVIDIA GPUs. It provides a kernel composition framework for designing custom GPU kernels and a mixed-precision tensor library capable of executing operations across diverse data formats, ranging from 64-bit floating point to 4-bit integers. The project features a toolkit for operator fusion that integrates activation functions and bias calculations directly into matrix multiplication kernels to reduce memory passes. It also includes a Python-based domain-specific langu

DeepEP is a distributed model accelerator and expert-parallel communication library designed to optimize the training and inference of large-scale neural networks. It provides specialized GPU communication kernels and a remote GPU memory interface to facilitate high-throughput data exchange between hardware nodes. The system utilizes dynamic kernel generation to compile optimized GPU kernels during execution, removing the need for separate installation compilation steps. It implements virtual-lane traffic isolation to prevent interference between different data streams and employs routing met

LeetCUDA is a collection of high-performance GPU kernel libraries focusing on memory optimization, activation functions, and attention mechanisms. It serves as a reference library for CUDA kernel implementations, ranging from basic element-wise operations to complex neural network components, and provides Python bindings to integrate these kernels into deep learning workflows. The project is distinguished by its focus on low-level hardware optimizations. This includes the use of tensor cores for half-precision matrix multiplication, asynchronous data pipelining with double buffering, and shar

XiangShan is a high-performance RISC-V processor core and a hardware description language framework. It provides a construction-based system for designing, simulating, and verifying complex processor micro-architectures and peripheral devices. The project includes a high-performance CPU simulator used for architectural exploration and functional verification of processor execution. The project implements a superscalar out-of-order CPU architecture that uses renaming and reorder buffers to execute instructions in parallel. It generates synthesizable Verilog files from hardware descriptions to

TIC-80 is a fantasy console platform and multi-language game engine that provides a virtual retro game development environment. It operates via a bytecode virtual machine that executes game logic within fixed memory and resolution constraints. The project distinguishes itself by offering integrated asset editors for pixel art, tile maps, and a pattern-based chiptune audio workstation all within a single environment. It supports multi-language scripting, allowing developers to write logic in Lua, JavaScript, or Ruby, and provides a standalone game exporter to package projects into native execu

هذا المشروع عبارة عن مولد معرفات فريدة موزع مصمم لإنتاج معرفات فريدة عالميًا وقابلة للفرز بحجم 64 بت عبر عقد متعددة. ينفذ خوارزمية متوافقة مع Snowflake تمنع التصادمات من خلال الجمع بين الطوابع الزمنية، ومعرفات العامل، وأرقام التسلسل في عدد صحيح واحد. يتضمن النظام منسق معرف العامل لتخصيص والحفاظ على هويات الجهاز الفريدة أثناء بدء تشغيل المثيل والترحيل باستخدام استراتيجيات مدعومة بقاعدة بيانات. لزيادة إنتاجية الطلبات وتقليل التأخير، يستخدم طبقة تخزين مؤقت بحلقة (Ring-buffer) تقوم بتوليد المعرفات مسبقًا وتستخدم آلية إعادة تعبئة قائمة على العتبة. يوفر البرنامج قدرات لإدارة مفاتيح قاعدة البيانات الموزعة، وتنسيق عقد النظام، وتكوين توزيع البتات لموازنة احتياجات التزامن مقابل عمر النظام. كما يتضمن أدوات لتحليل المعرفات المولدة مرة أخرى إلى مكوناتها الأصلية.

Flashlight هي مكتبة تعلم آلي مستقلة بلغة C++ ومكتبة موترات تستخدم لبناء وتدريب الشبكات العصبية. تعمل كإطار عمل شامل للشبكات العصبية ومحرك للتمايز التلقائي، مما يوفر الأدوات لبناء رسوم بيانية للحساب وحساب التدرجات عبر الانتشار العكسي. يعمل المشروع كإطار عمل للتدريب الموزع، حيث يستخدم عمليات (All-reduce) لمزامنة التدرجات والمعلمات عبر عقد حساب وأجهزة متعددة. يتميز بالتكامل العميق لمعالجة الموترات عالية الأداء، وقابلية التشغيل البيني لذاكرة الجهاز الأصلية، ونظام لمزامنة الأوزان عبر العمال الموزعين لتسريع تدريب النماذج واسعة النطاق. يغطي إطار العمل مجموعة واسعة من قدرات التعلم العميق، بما في ذلك تكوين الطبقات المعيارية لتصميم بنيات معقدة مثل الكتل المتبقية (Residual blocks) والخلايا المتكررة. يوفر أدوات واسعة النطاق لإدارة البيانات للاستيعاب والجلب المسبق، إلى جانب أنظمة التسلسل لحفظ حالات النموذج. بالإضافة إلى ذلك، يتضمن مجموعة من أدوات المراقبة وقابلية المراقبة لتتبع مقاييس التدريب وقياس أخطاء التسلسل. تم تنفيذ المكتبة بلغة C++.

هذا تنفيذ تشفيري لدالة Argon2 المعتمدة على الذاكرة (memory-hard)، وتعمل كمكتبة لتجزئة كلمات المرور ودالة لاشتقاق المفاتيح. تقوم بتحويل كلمات المرور والأملاح (salts) إلى تجزئات آمنة وتوليد مفاتيح تشفير مصممة لمقاومة هجمات كسر الأجهزة عالية السرعة. تستخدم المكتبة تصميماً يعتمد على الذاكرة يتطلب ذاكرة وصول عشوائي (RAM) كبيرة لمنع التسريع عبر وحدات معالجة الرسومات (GPUs) أو الدوائر المتكاملة الخاصة بالتطبيقات (ASICs). تدمج وصولاً للذاكرة مستقلاً عن البيانات لمنع هجمات التوقيت الجانبية (side-channel timing attacks) وتدعم دمج المفاتيح السرية أو الـ peppers للحماية من هجمات القوة الغاشمة على الأملاح المخترقة. تشمل القدرات الإضافية ترميز تجزئة كلمة المرور للتخزين والنقل، والقدرة على ربط التجزئات ببيانات سياق محددة، وإدارة آمنة للذاكرة تقوم بمسح المخازن المؤقتة الحساسة فور الاستخدام.

TileLang is a Python-embedded domain-specific language compiler that JIT-compiles and autotunes GPU kernels. It uses a tile-based DSL, automatic software pipelining, and parallel autotuning to generate optimized GPU kernels at runtime. It supports tensor core operations with Pythonic syntax, automatic memory management, and thread mapping. The compiler searches over tile sizes, thread counts, and scheduling policies, compiling and benchmarking candidates in parallel to find the fastest kernel. It also caches compiled binaries and tuning results to disk for reuse across sessions. TileLang inc