Awesome GitHub RepositoriesSimulation Flow Controllers

AirSim is a high-fidelity simulation platform designed for the development and testing of autonomous vehicles. Built as a plugin for game engines, it provides a physics-based environment that models vehicle dynamics and sensor data, serving as a foundation for robotics research, computer vision training, and reinforcement learning. The platform distinguishes itself through its support for hardware-in-the-loop and software-in-the-loop testing, allowing developers to validate control logic and firmware against real-world signals or concurrent processes. It offers extensive programmatic control

Genact is a terminal activity simulator and fake log generator designed to create the appearance of professional development and system administration work. It functions as a command line simulation tool that outputs a stream of believable system messages to mimic background computer processing. The tool operates as a terminal screensaver that can prevent a computer from entering an idle or sleep state by maintaining a continuous process of simulated technical activity. It supports multiple predefined scenes and provides controls for simulation speed and run duration. The project includes ca

Oasis 是一个由 LLM 驱动的多智能体社交模拟器和研究工具，旨在研究合成社会现象。它作为合成社交网络平台，复制了社交网站的基础设施，包括用户个人资料、关注关系和内容发现机制，以大规模模拟类人社交行为。 该框架编排大规模智能体群体，支持多达一百万个自主智能体。它通过使用工具调用编排器将语言模型输出转换为具体的社交动作和外部工具执行，同时使用时间加速模拟时钟将事件序列与实时解耦，从而脱颖而出。 该系统涵盖了广泛的功能领域，包括社交平台建模、基于图的社交网络映射和基于算法的内容推荐。它为信息传播建模、群体极化分析和智能体访谈提供了专门的研究工具，并由用于回顾性数据分析的持久活动日志记录提供支持。 该项目使用 Python 实现。

Digital-Logic-Sim 是一个数字逻辑模拟器和交互式电路设计器，用于构建和模拟数字硬件电路。它作为一个可视化编辑器和逻辑状态可视化器，允许使用逻辑门、导线和自定义芯片创建复杂的数字逻辑模型。 该系统包括一个自定义逻辑芯片构建器，能够将基本逻辑门分组为可重用组件，以创建分层硬件架构。用户可以通过逻辑状态可视化器监控这些设计，该可视化器使用指示灯和十六进制格式显示信号状态和内存值。 该软件涵盖具有网格吸附功能的电路设计和布局编辑，以及用于暂停或单步执行信号转换的模拟播放控制。它还提供硬件模拟功能，例如脉冲信号生成和通过可配置蜂鸣器组件进行的音频信号生成。 设计工作流工具包括组件库管理系统，以及用于跟踪布局修改的撤销和重做历史记录。

Verilator is a hardware simulation engine and toolchain that translates Verilog and SystemVerilog hardware description languages into optimized C++ or SystemC models. It functions as a compiler and transpiler, converting hardware designs into executable binaries to achieve high-speed simulation and integration into software environments. The project distinguishes itself by focusing on simulation acceleration through the generation of optimized C++ classes and cycle-accurate models. It provides a SystemVerilog linter for static analysis of hardware designs and a hardware coverage analyzer to t

Avian is a 2D physics engine and rigid body dynamics simulator designed to calculate physical motion using mass, forces, and velocity. It provides a framework for simulating rigid body dynamics, collision detection, and joint constraints for games and applications. The engine utilizes a modular physics pipeline with a plugin-based architecture, allowing for the customization of simulation fidelity settings and the extension of collision backends. It includes a specialized kinematic character controller for implementing entity movement and sliding behavior against physical geometry. The syste