6 个仓库
Static analysis techniques that solve systems of constraints to track variable ranges and pointer offsets.
Distinct from Range Constraints: Candidates focus on runtime value enforcement or random test data constraints, not static program analysis via constraint solving.
Explore 6 awesome GitHub repositories matching programming languages & runtimes · Constraint-Based Value Analysis. Refine with filters or upvote what's useful.
Mythril 是一个以太坊虚拟机 (EVM) 智能合约安全分析器,使用符号执行在部署前识别字节码中的漏洞。它作为一个漏洞扫描器和形式化审计工具,将程序输入视为数学符号,以证明合约逻辑中存在漏洞。 该工具执行字节码级分析,以检测可能被高级编译器隐藏的缺陷。它集成了 SMT 求解器来确定特定漏洞状态是否可达,并将符号执行跟踪与已知安全缺陷签名库进行比较。 该项目涵盖了广泛的安全分析功能,包括区块链漏洞检测、合约逻辑的形式化审计以及自动化安全测试。它还提供 Git 工作流集成,以在提交过程中验证代码。
Integrates SMT solvers to mathematically prove the reachability of specific vulnerability states.
Triton is a dynamic binary analysis framework designed to automate reverse engineering. It functions as a multi-architecture CPU emulator, an SMT-based symbolic execution engine, and a dynamic taint analysis tool. The framework translates raw machine instructions into abstract syntax trees, allowing it to represent binary program logic as a structured intermediate representation. This allows the system to map multiple hardware instruction sets to a single analysis framework and translate machine instructions into mathematical formulas for solving constraints. Its capabilities cover the simul
Translates machine instructions into mathematical formulas for formal analysis using SMT-based constraint solvers.
Ikos is a formal verification suite and static analysis framework designed to prove the absence of undefined behaviors and runtime errors in C and C++ source code. It functions as an abstract interpretation tool that approximates program execution to identify potential crashes and software defects. The system utilizes a compiler front-end to translate source code into a specialized abstract representation. This process decouples language parsing from the analysis logic, allowing the framework to perform deep program analysis via a formal verification system. The toolkit covers several analys
Tracks variable ranges and pointer offsets by solving systems of constraints during program traversal.
Kani is a formal verification tool and model checker for Rust. It functions as a bit-precise static analyzer that mathematically proves the correctness and memory safety of code by exhaustively analyzing program states to identify undefined behavior, panics, and logic errors. The tool identifies bugs by producing concrete counterexamples when program assertions or safety contracts are violated. It enables the definition of function contracts through preconditions and postconditions to verify that inputs and outputs match expected behavior. The system provides capabilities for Rust program an
Translates program logic into mathematical constraints to prove the absence of bugs using SMT solvers.
SVF is an open-source static program analysis framework and points-to analysis library that tracks memory references, variable aliases, and data dependencies across whole programs. The platform translates compiled intermediate code formats into unified internal representations, constructing constraint graphs, call graphs, and control-flow graphs to model interprocedural execution behavior and memory state. The framework incorporates specialized engines for flow-sensitive, flow-insensitive, and context-sensitive pointer analysis alongside sparse value-flow graph generation. It features memory
Builds constraint graphs for inclusion-based pointer analysis by iteratively resolving and adding copy edges.
This project is an open-source computer-aided design toolchain designed for the synthesis, placement, and routing of hardware designs onto programmable logic architectures. It serves as a comprehensive framework for research and development, enabling the transformation of hardware description language designs into optimized netlists and physical implementation files. By providing a modular pipeline, the system facilitates the entire flow from initial logic synthesis to the generation of configuration data for programmable hardware devices. The toolchain distinguishes itself through its focus
The toolchain evaluates the performance of a design by applying timing constraints and verifying that the implementation meets required signal propagation speeds.