4 个仓库
Techniques for aligning data structures and access patterns with CPU cache lines to minimize latency.
Distinct from Allocator Local Caches: Existing candidates focus on memory allocator pools or persistent storage caches, not CPU cache line alignment and thread affinity.
Explore 4 awesome GitHub repositories matching programming languages & runtimes · Cache Locality Optimizations. Refine with filters or upvote what's useful.
This project is a comprehensive educational resource and programming course covering C++ language semantics and features from C++03 through C++26. It provides structured tutorials and technical guides focused on modern C++ development. The material offers specialized instruction on template metaprogramming, including the use of type traits and compile-time computations. It features detailed guides on concurrency and parallelism for multi-core execution, as well as a reference for software design applying SOLID principles and RAII. Additionally, it covers build performance optimization to redu
Provides instruction on aligning software patterns with cache locality and thread affinity to increase data access speed.
This project is a collection of educational resources and technical guides focused on Go performance optimization. It provides instruction on improving execution speed and reducing memory usage through code and architectural refinements. The guides cover advanced strategies for low-level programming, including the use of assembly for SIMD instructions and unsafe pointers for direct memory manipulation. It also details concurrency optimization techniques such as lock sharding and cache-line padding to reduce contention and improve hardware utilization. The material encompasses broad capabilit
Guides the alignment of data structures with CPU cache lines to reduce pointer chasing and maximize throughput.
perf-ninja is a collection of educational resources and curricula focused on CPU architecture, memory hierarchies, SIMD programming, and low-level performance engineering. It provides instructional material and practical labs for identifying and fixing CPU bottlenecks, such as cache misses and branch mispredictions. The project differentiates itself through specialized training in hardware-level optimizations, including the use of compiler intrinsics for SIMD vectorization and the implementation of branchless predicate execution to eliminate pipeline stalls. It also covers advanced binary-lev
Provides guidance on improving memory access patterns through tiling and alignment to reduce cache misses.
The project is a reusable collection of modular compiler and toolchain technologies designed for building optimizers, code generators, and multi-language programming environments. It provides foundational compiler frontend technologies that translate source code written in C, C++, and Objective-C into a low-level programming language and intermediate code format. This intermediate representation enables cross-language analysis, program transformation, and target-independent optimization alongside a cross-platform programming framework that allows developers to write single-source accelerated a
Transforms array access patterns and loop layouts to improve cache reuse and reduce latency.