# riscv-collab/riscv-gnu-toolchain

**Attribution required: if you use, quote, or summarise this content, you must credit and link back to [awesome-repositories.com](https://awesome-repositories.com/repository/riscv-collab-riscv-gnu-toolchain).**

4,540 stars · 1,394 forks · C · NOASSERTION

## Links

- GitHub: https://github.com/riscv-collab/riscv-gnu-toolchain
- awesome-repositories: https://awesome-repositories.com/repository/riscv-collab-riscv-gnu-toolchain.md

## Description

This project is a cross-compiler toolchain for RISC-V software development. It provides the necessary components to compile C and C++ source code into executable binaries and libraries specifically for the RISC-V hardware architecture.

The toolchain supports multi-architecture binary generation and multilib capabilities, allowing a single installation to target various instruction set specifications and bit-widths. It integrates with alternative compilers such as LLVM and Clang and includes a bootstrapped build pipeline to produce high-performance versions of the tools.

The system covers broad capability areas including embedded systems compilation and cross-platform deployment for Linux and macOS. It also incorporates system emulation and hardware simulation to validate toolchain logic and execute compiler test suites without requiring physical hardware.

## Tags

### Development Tools & Productivity

- [Cross-Compilation Toolchains](https://awesome-repositories.com/f/development-tools-productivity/cross-compilation-toolchains.md) — Provides a comprehensive cross-compilation toolchain for generating RISC-V executable binaries from a host machine.
- [Embedded Hardware Cross-Compilation](https://awesome-repositories.com/f/development-tools-productivity/cross-compilation-toolchains/embedded-hardware-cross-compilation.md) — Produces binaries tailored for embedded processors with specific RISC-V instruction sets and hardware constraints.
- [Multilib Binary Generation](https://awesome-repositories.com/f/development-tools-productivity/build-tooling/build-orchestration-logic/build-orchestration-configuration/build-automation-systems/build-systems/binary-compilation-toolchains/multilib-binary-generation.md) — Generates a single toolchain targeting multiple hardware architectures and interface standards across different bit-widths. ([source](https://github.com/riscv-collab/riscv-gnu-toolchain#readme))
- [Cross-Platform Toolchains](https://awesome-repositories.com/f/development-tools-productivity/cross-platform-toolchains.md) — Offers a complete suite of compilers and debuggers deployable on Linux and macOS to target RISC-V hardware.

### Hardware & IoT

- [RISC-V Software Development](https://awesome-repositories.com/f/hardware-iot/risc-v-software-development.md) — Provides the complete toolset necessary for building executable programs and libraries for the RISC-V hardware architecture.
- [Binary Emulators](https://awesome-repositories.com/f/hardware-iot/embedded-robotics/hardware-in-the-loop-simulators/binary-emulators.md) — Integrates software emulators to execute and analyze target RISC-V binaries on the host machine.
- [RISC-V Hardware Emulation](https://awesome-repositories.com/f/hardware-iot/embedded-robotics/hardware-in-the-loop-simulators/binary-emulators/hardware-accelerated-emulators/risc-v-hardware-emulation.md) — Provides a simulated environment to verify the logic of RISC-V binaries without requiring physical hardware.

### Operating Systems & Systems Programming

- [Multi-Architecture Support](https://awesome-repositories.com/f/operating-systems-systems-programming/multi-architecture-support.md) — Supports the generation of code for multiple RISC-V instruction set specifications and bit-widths within one installation. ([source](https://github.com/riscv-collab/riscv-gnu-toolchain/blob/master/README.md))
- [System Emulators](https://awesome-repositories.com/f/operating-systems-systems-programming/virtualization-emulation/hardware-emulators/hardware-interface-emulators/system-emulators.md) — Integrates with software emulators to simulate full-system or user-mode RISC-V environments for binary testing. ([source](https://github.com/riscv-collab/riscv-gnu-toolchain#readme))

### Programming Languages & Runtimes

- [C and C++ Cross-Compilation](https://awesome-repositories.com/f/programming-languages-runtimes/c-and-c-cross-compilation.md) — Provides core capabilities to compile C and C++ source code into executable binaries for RISC-V processors. ([source](https://github.com/riscv-collab/riscv-gnu-toolchain#readme))
- [Alternative Compiler Integrations](https://awesome-repositories.com/f/programming-languages-runtimes/compiler-interpreter-internals/compiler-toolchains/alternative-compiler-integrations.md) — Enables the integration of LLVM and Clang alongside the primary GNU toolchain. ([source](https://github.com/riscv-collab/riscv-gnu-toolchain#readme))

### Software Engineering & Architecture

- [Instruction Set Targets](https://awesome-repositories.com/f/software-engineering-architecture/performance-reliability/performance-optimization/computational-efficiency/cpu-optimization-strategies/hardware-instruction-targeting/instruction-set-targets.md) — Allows configuration of the compiler backend to target specific RISC-V instruction set extensions and bit-widths.

### DevOps & Infrastructure

- [Compiler Bootstrapping](https://awesome-repositories.com/f/devops-infrastructure/cicd-pipeline-automation/core-build-engines/build-toolchains/compiler-bootstrapping.md) — Implements a multi-stage build process to bootstrap a high-performance version of the RISC-V toolchain.