# pervognsen/bitwise

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5,250 stars · 233 forks · C · other · archived

## Links

- GitHub: https://github.com/pervognsen/bitwise
- awesome-repositories: https://awesome-repositories.com/repository/pervognsen-bitwise.md

## Description

Bitwise is a computer architecture education kit and a comprehensive set of guides for building a custom CPU, operating system, and compiler from scratch. It serves as a CPU design tutorial and a practical framework for implementing a unique instruction set architecture.

The project provides a custom instruction set architecture toolchain, including resources for creating a matching assembler and compiler. It further includes a hardware development guide for synthesizing computer components and peripheral controllers for deployment on programmable logic devices and FPGAs.

The kit covers full-stack systems engineering, spanning hardware emulation development, operating system implementation with task switching, and the creation of custom compiler toolchains. It includes instructions for building a complete computer system, from the initial hardware logic to the final software stack.

## Tags

### Education & Learning Resources

- [Computer Systems Education](https://awesome-repositories.com/f/education-learning-resources/computer-systems-education.md) — Serves as a comprehensive education kit for building a full hardware and software stack from scratch. ([source](https://github.com/pervognsen/bitwise/blob/master/FAQ.md))
- [Computer Architecture Curricula](https://awesome-repositories.com/f/education-learning-resources/computer-architecture-curricula.md) — Offers an educational kit and implementation exercises focused on processor design and low-level system architecture.

### Hardware & IoT

- [Step-by-Step Tutorials](https://awesome-repositories.com/f/hardware-iot/custom-cpu-architecture-design/step-by-step-tutorials.md) — A step-by-step walkthrough for creating a processor using hardware description languages and simulating its behavior.
- [Control Logic Design](https://awesome-repositories.com/f/hardware-iot/control-logic-design.md) — Provides the logic for developing CPU and peripheral controllers using hardware description languages. ([source](https://github.com/pervognsen/bitwise/blob/master/FAQ.md))
- [Custom CPU Architecture Design](https://awesome-repositories.com/f/hardware-iot/custom-cpu-architecture-design.md) — Enables the design of custom computer architectures from scratch using hardware description languages. ([source](https://github.com/pervognsen/bitwise/blob/master/README.md))
- [FPGA Hardware Design](https://awesome-repositories.com/f/hardware-iot/fpga-hardware-design.md) — Provides a comprehensive guide for designing synthesizable computer components and controllers for FPGAs. ([source](https://github.com/pervognsen/bitwise#readme))
- [HDL Logic Synthesis](https://awesome-repositories.com/f/hardware-iot/hdl-logic-synthesis.md) — Provides instructions for synthesizing computer components and peripheral controllers using hardware description languages for FPGA deployment.
- [FPGA Development Guides](https://awesome-repositories.com/f/hardware-iot/fpga-development-guides.md) — Guides the synthesis of computer components and peripheral controllers for deployment on FPGAs.

### Operating Systems & Systems Programming

- [Full-Stack Systems Engineering](https://awesome-repositories.com/f/operating-systems-systems-programming/full-stack-systems-engineering.md) — Provides a comprehensive framework for building a complete computer system from hardware logic to the final software stack.
- [CPU Architectures](https://awesome-repositories.com/f/operating-systems-systems-programming/cpu-architectures.md) — Provides educational resources and logic for creating custom processor architectures for FPGA synthesis.
- [Paging and Context Switching](https://awesome-repositories.com/f/operating-systems-systems-programming/kernel-core-internals/kernel-development/paging-and-context-switching.md) — Implements a kernel that manages concurrent execution through state-saving and restoring during context switches.
- [Operating System Kernels](https://awesome-repositories.com/f/operating-systems-systems-programming/kernel-core-internals/operating-system-kernels.md) — Provides a practical guide for building kernels and task-switching systems to manage concurrent processes.
- [Operating System Development](https://awesome-repositories.com/f/operating-systems-systems-programming/os-development-distributions/operating-system-development.md) — Guides the development of complete operating systems, ranging from simple task-switchers to full systems with GUIs. ([source](https://github.com/pervognsen/bitwise/blob/master/README.md))
- [Hardware Emulators](https://awesome-repositories.com/f/operating-systems-systems-programming/virtualization-emulation/hardware-emulators.md) — Implements software simulators to validate CPU behavior and hardware peripherals without requiring physical equipment.
- [Cycle-Accurate Emulators](https://awesome-repositories.com/f/operating-systems-systems-programming/virtualization-emulation/hardware-emulators/cycle-accurate-emulators.md) — Implements a cycle-accurate simulation of the processor and peripherals by tracking state changes on every clock tick.
- [Processor Emulators](https://awesome-repositories.com/f/operating-systems-systems-programming/virtualization-emulation/host-guest-integration-tools/processor-emulators.md) — Ships software to simulate processor logic and validate instructions before physical hardware deployment. ([source](https://github.com/pervognsen/bitwise#readme))
- [Implementation Courses](https://awesome-repositories.com/f/operating-systems-systems-programming/kernel-core-internals/operating-system-kernels/implementation-courses.md) — Offers a practical framework for learning to build a microcontroller kernel with task switching and memory management.
- [Emulated Hardware Debuggers](https://awesome-repositories.com/f/operating-systems-systems-programming/low-level-debuggers/emulated-hardware-debuggers.md) — Includes tools for creating software simulators and debuggers to validate the functionality of the custom CPU. ([source](https://github.com/pervognsen/bitwise/blob/master/README.md))

### DevOps & Infrastructure

- [Task Schedulers](https://awesome-repositories.com/f/devops-infrastructure/automation-orchestration/task-execution-frameworks/task-job-management/task-schedulers/os-scheduling-simulations/task-schedulers.md) — Implements a microcontroller operating system that manages concurrent tasks through a custom scheduler. ([source](https://github.com/pervognsen/bitwise#readme))
- [Virtual Hardware Simulators](https://awesome-repositories.com/f/devops-infrastructure/virtual-hardware-interfaces/virtual-hardware-simulators.md) — Creates cycle-accurate models of memory and interface components to facilitate system development without physical hardware. ([source](https://github.com/pervognsen/bitwise/blob/master/FAQ.md))

### Programming Languages & Runtimes

- [Compiler Toolchain Development](https://awesome-repositories.com/f/programming-languages-runtimes/compiler-toolchain-development.md) — Includes guides for creating a custom compiler and assembler to bootstrap a target architecture from a host system.
- [Educational Toolchains](https://awesome-repositories.com/f/programming-languages-runtimes/compiler-toolchain-development/minimalist-toolchains/educational-toolchains.md) — Provides resources for building a unique instruction set architecture with a matching assembler and compiler for educational purposes.
- [CPU Emulation Libraries](https://awesome-repositories.com/f/programming-languages-runtimes/cpu-emulation-libraries.md) — Simulates processor instruction sets by mapping opcodes to software functions that manipulate virtual registers and memory.
- [Language Implementation](https://awesome-repositories.com/f/programming-languages-runtimes/programming-language-varieties/programming-languages/language-implementation.md) — Provides a framework for implementing a complete programming language from scratch to target a custom CPU. ([source](https://github.com/pervognsen/bitwise/tree/master/noir/noir))
- [Architecture-Specific Generators](https://awesome-repositories.com/f/programming-languages-runtimes/compilation-target-specifications/architecture-specific-generators.md) — Provides a backend that translates abstract syntax trees into machine-specific instructions for a custom CPU architecture.