# hneemann/digital **Attribution required: if you use, quote, or summarise this content, you must credit and link back to [awesome-repositories.com](https://awesome-repositories.com/repository/hneemann-digital).** _How this analysis was created: the description and tags below were written by an AI model that read this project's README and public documentation pages; stars, license and language come straight from the GitHub API. The model does not read the source code._ 5,793 stars · 576 forks · Java · GPL-3.0 ## Links - GitHub: https://github.com/hneemann/Digital - awesome-repositories: https://awesome-repositories.com/repository/hneemann-digital.md ## Topics `circuit` `digital-circuits` `education` `logic` `logic-gates` `logisim` `simulator` ## Description Digital is a digital logic circuit simulator and hardware design verification tool. It provides a visual environment for designing, testing, and verifying electronic circuits using event-based simulation and automated logic synthesis. The platform functions as a logic synthesis tool that applies boolean algebra to minimize gate configurations and convert truth tables into efficient hardware. It also serves as an HDL export tool, translating visual circuit graphs into VHDL or Verilog code, and as a CPLD deployment tool that generates JEDEC files for flashing programmable logic chips. The software covers a broad range of capabilities including finite state machine design, hierarchical and parameterized circuit organization, and signal state visualization. It includes utilities for automated logic verification, signal propagation tracking, and a TCP-based remote interface for simulator management and embedded system debugging. ## Tags ### Graphics & Multimedia - [Logic Circuit Simulation](https://awesome-repositories.com/f/graphics-multimedia/logic-circuit-simulation.md) — Provides a visual environment for designing and simulating the behavior of digital logic gates and wiring. ### Hardware & IoT - [Visual Design Interfaces](https://awesome-repositories.com/f/hardware-iot/parameterized-circuit-design/visual-design-interfaces.md) — Provides a canvas-based environment for designing and building digital circuits using a library of gates and components. ([source](https://github.com/hneemann/digital#readme)) - [Boolean Logic Minimization](https://awesome-repositories.com/f/hardware-iot/boolean-logic-minimization.md) — Implements mathematical algorithms to simplify logic circuits by minimizing truth tables through boolean algebra. - [Hardware Design Verifiers](https://awesome-repositories.com/f/hardware-iot/design-lifecycle-management/hardware-engineering-management/hardware-management/hardware-design-verifiers.md) — Provides hardware design verification tools to analyze digital circuit specifications and logic models for design flaws. - [Embedded Systems Debugging](https://awesome-repositories.com/f/hardware-iot/embedded-systems-debugging.md) — Enables low-level debugging of embedded architectures by controlling virtual hardware simulations over a network connection. - [Hardware State Machine Design](https://awesome-repositories.com/f/hardware-iot/hardware-state-machine-design.md) — Enables the visual creation of finite state machines and their conversion into implementing hardware circuits. ([source](https://github.com/hneemann/digital#readme)) - [Hierarchical Circuit Organization](https://awesome-repositories.com/f/hardware-iot/hierarchical-circuit-organization.md) — A system for arranging nested structures and reusable components on a canvas to organize large-scale hardware projects. ([source](https://github.com/hneemann/digital#readme)) - [Hierarchical Component Composition](https://awesome-repositories.com/f/hardware-iot/hierarchical-component-composition.md) — Embeds saved circuit designs as sub-components within larger systems to manage complexity in hardware architectures. - [Logic Circuit Synthesis](https://awesome-repositories.com/f/hardware-iot/logic-circuit-synthesis.md) — Converts truth tables and state transition tables into combinatorial and sequential gate-level circuits. ([source](https://github.com/hneemann/digital#readme)) - [Graph Representations](https://awesome-repositories.com/f/hardware-iot/logic-circuit-synthesis/graph-representations.md) — Stores digital designs as interconnected nodes and edges to facilitate structural analysis and logic synthesis. - [Logic Synthesis Tools](https://awesome-repositories.com/f/hardware-iot/logic-synthesis-tools.md) — Provides logic synthesis tools to convert high-level hardware descriptions into structural netlists of logic gates. - [CPLD Bitstream Programming](https://awesome-repositories.com/f/hardware-iot/cpld-bitstream-programming.md) — Supports CPLD bitstream programming by generating JEDEC files to update logic configurations on programmable chips. - [Custom Component Integration](https://awesome-repositories.com/f/hardware-iot/custom-component-integration.md) — A feature allowing the integration of custom logic components by loading external compiled files into the environment. ([source](https://github.com/hneemann/digital#readme)) - [CPLD Flash Utilities](https://awesome-repositories.com/f/hardware-iot/embedded-device-programmers/cpld-flash-utilities.md) — Generates JEDEC files to flash circuit designs directly to GAL or ATF CPLD chips. ([source](https://github.com/hneemann/digital#readme)) - [Hardware Description Exporters](https://awesome-repositories.com/f/hardware-iot/hardware-capability-modeling/hardware-description-exporters.md) — Translates internal circuit representations into standardized hardware description formats for deployment to programmable logic devices. - [Parameterized Circuit Design](https://awesome-repositories.com/f/hardware-iot/parameterized-circuit-design.md) — Provides design methods for creating hardware circuits with adjustable parameters such as bit widths. - [Reusable Hardware Modules](https://awesome-repositories.com/f/hardware-iot/reusable-hardware-modules.md) — Defines reusable templates with adjustable variables for hardware modules that scale across different bit widths. - [Schematic-to-HDL Translation](https://awesome-repositories.com/f/hardware-iot/schematic-to-hdl-translation.md) — Translates visual circuit schematics into VHDL or Verilog code for use in FPGA synthesis. ([source](https://github.com/hneemann/digital#readme)) - [Signal Oscillation Debuggers](https://awesome-repositories.com/f/hardware-iot/signal-oscillation-debuggers.md) — Provides tools for detecting and analyzing unstable signal oscillations in digital logic networks via gate-by-gate propagation tracking. ([source](https://github.com/hneemann/digital#readme)) - [Signal Propagation Analysis](https://awesome-repositories.com/f/hardware-iot/signal-propagation-analysis.md) — Implements signal propagation analysis to monitor gate state changes and detect instabilities in digital circuits. ### Software Engineering & Architecture - [Logic Event Simulators](https://awesome-repositories.com/f/software-engineering-architecture/event-driven-architectures/simulation-engines/logic-event-simulators.md) — A simulation engine that models digital logic operation using event-based simulation to verify design functionality. ([source](https://github.com/hneemann/digital#readme)) - [Circuit Signal Chronograms](https://awesome-repositories.com/f/software-engineering-architecture/software-architecture/diagramming-standards/text-to-diagram-generators/timing-diagram-generators/circuit-signal-chronograms.md) — Generates circuit signal chronograms to visually track and analyze signal transitions and temporal states over time. ([source](https://github.com/hneemann/digital#readme)) ### Testing & Quality Assurance - [Circuit Functional Verification](https://awesome-repositories.com/f/testing-quality-assurance/behavior-verification/circuit-functional-verification.md) — Defines and executes specific test cases to automate the verification of a digital circuit's functional behavior. ([source](https://github.com/hneemann/digital#readme)) ### Development Tools & Productivity - [Programmable Logic Development Environments](https://awesome-repositories.com/f/development-tools-productivity/programmable-logic-development-environments.md) — Provides a development environment to translate hierarchical circuit structures into standardized formats for hardware deployment.