# darklife/darkriscv

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2,490 stars · 320 forks · Verilog · bsd-3-clause

## Links

- GitHub: https://github.com/darklife/darkriscv
- awesome-repositories: https://awesome-repositories.com/repository/darklife-darkriscv.md

## Topics

`core` `fpga` `risc-v` `riscv` `verilog`

## Description

darkriscv is a collection of tools and projects for RISC-V processor implementation, hardware debugging, and automated FPGA synthesis. It provides a hardware design that implements a RISC-V processor core and system components for deployment on programmable logic.

The project includes a hardware debugger with a command-line interface for verifying processor state by manipulating registers and dumping memory on a hardware target. It also features a set of scripts and project files to automate the synthesis and programming of hardware designs within a Linux environment.

The codebase covers hardware description language projects for system-on-chip integration, mapping instruction-set architectures to hardware signals, and combining processor cores with memory and communication interfaces.

## Tags

### Hardware & IoT

- [RISC-V ISA Implementations](https://awesome-repositories.com/f/hardware-iot/risc-v-isa-implementations.md) — Implements the RISC-V instruction set and its architectural extensions in synthesizable hardware logic. ([source](https://cdn.jsdelivr.net/gh/darklife/darkriscv@master/README.md))
- [ISA-to-Hardware Mappings](https://awesome-repositories.com/f/hardware-iot/isa-to-hardware-mappings.md) — Translates standard RISC-V assembly instructions into the hardware signals that drive the CPU execution pipeline.
- [SoC System Integration](https://awesome-repositories.com/f/hardware-iot/soc-system-integration.md) — Combines processor cores with memory and communication interfaces to create a functioning hardware system.
- [System-on-Chip Integration](https://awesome-repositories.com/f/hardware-iot/system-on-chip-integration.md) — Provides a framework to combine processor cores with memory and communication interfaces for SoC architectures. ([source](https://cdn.jsdelivr.net/gh/darklife/darkriscv@master/README.md))
- [Hardware Debuggers](https://awesome-repositories.com/f/hardware-iot/embedded-robotics/hardware-in-the-loop-simulators/binary-emulators/hardware-accelerated-emulators/risc-v-processor-cores/hardware-debuggers.md) — Provides a command-line interface for verifying processor state by manipulating registers and dumping memory.
- [Embedded Systems Debugging](https://awesome-repositories.com/f/hardware-iot/embedded-systems-debugging.md) — Enables low-level analysis of RISC-V processor state by manipulating registers and dumping memory.
- [Bitstream Programming](https://awesome-repositories.com/f/hardware-iot/fpga-hardware-design/bitstream-programming.md) — Implements utilities to program synthesized bitstreams directly onto programmable logic boards.
- [Synthesis Automation Tools](https://awesome-repositories.com/f/hardware-iot/fpga-hardware-design/synthesis-automation-tools.md) — Includes scripts and project files for automating the synthesis and programming of hardware designs on Linux.

### Programming Languages & Runtimes

- [Hardware Description Languages](https://awesome-repositories.com/f/programming-languages-runtimes/programming-language-varieties/hardware-description-languages.md) — Utilizes hardware description languages to define processor logic and system components for synthesis.

### Development Tools & Productivity

- [FPGA](https://awesome-repositories.com/f/development-tools-productivity/workflow-automation-tools/build-task-automation/build-automation/fpga.md) — Provides a toolset for automating the build and programming process for FPGA hardware targets. ([source](https://cdn.jsdelivr.net/gh/darklife/darkriscv@master/README.md))

### DevOps & Infrastructure

- [Hardware Synthesis Toolchains](https://awesome-repositories.com/f/devops-infrastructure/build-toolchains/hardware-synthesis-toolchains.md) — Coordinates the synthesis, place-and-route, and bitstream generation process via automated Linux shell scripts.

### Operating Systems & Systems Programming

- [Physical Register Mapping](https://awesome-repositories.com/f/operating-systems-systems-programming/virtualization-emulation/virtual-device-drivers/virtual-hardware-mappings/physical-register-mapping.md) — Implements physical register mapping to allow external software to control hardware behavior via specific address locations.

### Security & Cryptography

- [Hardware Debugging Interfaces](https://awesome-repositories.com/f/security-cryptography/security/infrastructure-and-hardware/embedded-and-hardware/hardware-debugging-interfaces.md) — Provides a command-line interface for real-time hardware verification by manipulating registers and dumping memory.