hyperai/tvm-cn
Tvm Cn
This project is a collection of technical guides and manuals for the Apache TVM compiler stack translated into Simplified Chinese. It provides translated documentation focusing on deep learning compilation and the transformation of machine learning models into optimized executable code.
The documentation covers the use of hardware backend guides for deploying models across CPUs, GPUs, and specialized accelerators. It also includes references for intermediate representations and graph-level optimizations used to compile tensor programs.
Features
- Technical Document Translations - Provides the full suite of Apache TVM technical guides and manuals translated from English into Simplified Chinese.
- Chinese Language Translations - Converting complex technical guides and API references from English to Simplified Chinese for better accessibility.
- Technical Documentation Translations - Accessing technical guides and API references for the Apache TVM compiler stack translated into Simplified Chinese.
- AOT Deep Learning Compilers - Transform learning models into optimized executable code that runs efficiently across CPUs, GPUs, and ARM architectures.
- Automated Schedule Tuning - Provides documentation on automating the search for optimal execution strategies to maximize hardware performance.
- Graph Execution Optimizers - Refine operator execution on hardware by applying graph-level optimizations and mapping tensor programs to device resources.
- Model Performance Optimizations - Applies graph and tensor program transformations and automated tuning to maximize execution speed on specific hardware.
- Model Compilers - Transforms high-level neural network definitions into optimized, hardware-specific executable code.
- Edge AI Model Deployment - Compiles and optimizes models for execution in non-Python environments including mobile, edge, and bare metal devices.
- Model Execution Environments - Manages the underlying execution environment to run compiled machine learning models across various hardware backends.
- Model Deployments - Builds optimized models into deployable modules for execution on CPUs, GPUs, and specialized hardware accelerators.
- Operator Fusions - Supports merging consecutive neural network layers into single kernels to minimize memory access and processing time.
- Model Importers - Provides utilities to import pre-trained models from external frameworks into an internal representation for optimization.
- Tensor Program Optimizations - Applying graph transformations and automated tuning to maximize the execution speed of tensor operations on specific hardware.
- Compiler Documentation - Technical documentation covering the transformation of machine learning models into optimized executable code for diverse hardware backends.
- Compiler Intermediate Representations - Detailed references for intermediate representations and graph-level optimizations used to compile tensor programs.
- Intermediate Representation Lowering - Transform high level graph operators into low level primitive functions that align with the target hardware representation.
- IR Lowering - Describes the transformation of high-level graph operators into low-level primitives matching target hardware specifications.
- Target Code Generators - Translates intermediate representations into executable formats like LLVM IR or CUDA for specific hardware backends.
- Multi-Level Pipelines - Utilizes a multi-stage lowering process to progressively transform computational graphs through various levels of representation.
- Operator Fusion - Merge consecutive tensor operations into a single execution step to reduce processing overhead and increase speed.
- Machine Learning Model Portability - Importing pre-trained models from various frameworks and translating them into target-specific formats like LLVM or CUDA.
- Custom Inference Operations - Allows users to define and register custom inference operations not natively supported by the compiler.
- Hardware Acceleration Guides - Instructions for deploying optimized machine learning models across CPUs, GPUs, and specialized hardware accelerators.
- Performance Scheduling - Schedule low-level tensor expressions to maximize execution performance based on the specific characteristics of the target device.
- Remote Compiler Execution - Enables sending compiled libraries to remote devices via RPC for benchmarking and performance data collection.
