18 repositorios
Techniques for mapping large data files directly into process memory for efficient access.
Distinguishing note: Focuses on disk-to-memory mapping for model weights rather than general database storage.
Explore 18 awesome GitHub repositories matching data & databases · Memory Mapping Utilities. Refine with filters or upvote what's useful.
LLM101n is an educational machine learning curriculum and open-source resource designed to teach the fundamental principles and practical implementation of large language models. It functions as a technical manual that guides users through the end-to-end process of building and training neural network architectures from scratch using a dynamic tensor library for automatic differentiation and GPU-accelerated computation. The project distinguishes itself through interactive, notebook-based instruction that allows for real-time visualization of training processes. It supports rapid experimentati
Maps large binary datasets directly into memory to minimize overhead during high-frequency training iterations.
This project is a low-dependency engine designed for training large language models using native C and CUDA. It provides a bare-metal environment for tensor computation, allowing for the execution of neural network operations directly on hardware accelerators without the overhead of high-level software abstractions. The framework distinguishes itself by implementing manual gradient backpropagation and custom hardware-specific kernels, providing granular control over memory mapping and computational precision. It supports distributed training across multiple graphics processors and compute nod
Converts multi-dimensional tensor structures into linear memory addresses to maximize hardware cache efficiency.
RPCS3 is a C++ application that functions as a software environment for executing and managing PlayStation 3 console titles on desktop operating systems. It operates by translating proprietary console hardware instructions and graphics commands into formats compatible with modern computer hardware, allowing for the execution of original game software. The emulator distinguishes itself through a comprehensive suite of tools for managing game libraries, applying software patches to modify performance characteristics, and tracking the compatibility status of individual titles. It includes integr
Translates the console's specific memory addressing and protection schemes into the host system's memory space to ensure data integrity.
This project provides an open-source firmware platform and complete build environment for portable multi-tool hardware. It functions as an embedded operating system designed to manage radio, infrared, and physical interface components, enabling users to develop custom applications and system logic for specialized hardware devices. The firmware distinguishes itself through a modular architecture that organizes system functionality into isolated units, allowing for the development of custom user interfaces and logic. It includes a comprehensive collection of low-level drivers and applications s
Maps hardware registers directly into memory to enable high-speed peripheral communication.
This project is an educational resource for developing bare-metal operating systems and kernels from scratch on Raspberry Pi hardware. It provides a structured guide to systems programming using the Rust language, focusing on the implementation of core kernel components that execute directly on ARM-based hardware without the support of an underlying operating system or standard library. The tutorials emphasize a modular architecture that separates hardware-independent kernel logic from processor-specific and board-specific configurations. By utilizing a hardware abstraction layer and distinct
Accesses system peripherals and registers by mapping physical memory addresses directly into the kernel address space.
MNN is a high-performance inference engine and framework designed for on-device machine learning. It provides a comprehensive environment for executing, optimizing, and deploying neural network models directly on mobile and resource-constrained edge devices. The framework distinguishes itself through a robust model optimization toolkit that supports quantization, compression, and structural graph manipulation to minimize memory footprint and maximize execution speed. It features a modular architecture that abstracts hardware-specific backends, allowing models to run efficiently across diverse
Maps device-resident tensors to host pointers and manages execution wait states for data consistency.
OpenVINO is an AI inference engine and model serving platform designed to execute optimized deep learning models across CPUs, GPUs, and NPUs through a unified API. It includes a model optimization toolkit for converting, quantizing, and compressing models from various frameworks, alongside a specialized generative AI runtime for large language models. The project distinguishes itself through a plugin-based hardware acceleration layer that maps neural network operations to vendor-specific drivers. It features advanced execution mechanisms such as continuous batching, speculative decoding, and
Assigns semantic meaning to tensor dimensions to ensure correct image resizing and preprocessing.
Cutlass is a collection of C++ templates and Python interfaces for implementing high-performance linear algebra operations on NVIDIA GPUs. It provides a kernel composition framework for designing custom GPU kernels and a mixed-precision tensor library capable of executing operations across diverse data formats, ranging from 64-bit floating point to 4-bit integers. The project features a toolkit for operator fusion that integrates activation functions and bias calculations directly into matrix multiplication kernels to reduce memory passes. It also includes a Python-based domain-specific langu
Maps multi-dimensional tensor data into linear memory to optimize direct hardware access and movement.
Einops is a tensor manipulation library that provides a framework-agnostic interface for reshaping, Einstein summation, and multi-dimensional array operations. It serves as an abstraction layer that works across NumPy, PyTorch, TensorFlow, and JAX, allowing for tensor transformations without changing the API. The library distinguishes itself through a declarative notation system that uses readable string patterns to describe tensor rearrangements and reductions. This approach includes an extended Einstein summation interface that supports multi-letter axis names and a named dimension mapping
Extracts lengths of tensor axes into dictionaries using named patterns to isolate relevant dimensions.
Torch7 is a scientific computing environment and tensor computation library used for deep learning research and numerical analysis. It functions as a Lua-based framework for training neural networks and learning agents, providing a toolkit for implementing architectures and training through reinforcement learning algorithms. The project is distinguished by its tight integration with C, utilizing a binding layer to map high-level scripting to low-level C structures for direct memory access. It supports hardware-accelerated computation by offloading linear algebra and convolution operations to
Executes functions using elements from several tensors simultaneously to compute and store results.
This project is a game AI training framework designed to develop and monitor reinforcement learning agents within a legacy game environment. It functions as a training and monitoring system that optimizes autonomous agents to complete game objectives through exploration and reward-based learning. The framework includes tools for game memory mapping and real-time trajectory visualization. These capabilities translate raw game memory addresses into visual coordinates, allowing agent movements and session data to be streamed to a map for the analysis of navigation patterns and area exploration.
Reads raw game memory addresses directly to derive entity positions and environmental data.
This project is a Nintendo Entertainment System emulator written in Go. It functions as a hardware simulation that executes game ROMs by mimicking the original console's circuitry, including the processor and picture processing unit. The emulator includes a game library browser that identifies local files and retrieves titles and thumbnails from online databases using file checksums. It also implements a system of memory management mappers to ensure compatibility across various game ROM formats and hardware configurations. The software covers high-level capabilities for game ROM execution an
Translates console-specific memory addressing and bank-switching schemes into host system memory space.
TileLang is a Python-embedded domain-specific language compiler that JIT-compiles and autotunes GPU kernels. It uses a tile-based DSL, automatic software pipelining, and parallel autotuning to generate optimized GPU kernels at runtime. It supports tensor core operations with Pythonic syntax, automatic memory management, and thread mapping. The compiler searches over tile sizes, thread counts, and scheduling policies, compiling and benchmarking candidates in parallel to find the fastest kernel. It also caches compiled binaries and tuning results to disk for reuse across sessions. TileLang inc
Translates between shared memory tile layouts and MMA register file layouts for tensor cores.
tiny-llm is a large language model inference engine and transformer model implementation. It serves as a quantized model runtime and paged key-value cache manager, providing a specialized inference stack optimized for Apple Silicon. The system distinguishes itself through high-throughput execution techniques, including continuous batching and paged attention. It utilizes a paged memory system to eliminate fragmentation during token generation and employs on-the-fly dequantization of compressed weights to reduce the memory footprint during matrix multiplication. The project covers a broad ran
Gathers fragmented memory pages into contiguous tensors to maintain compatibility with standard compute kernels.
Neural Prophet es una biblioteca de pronóstico de series temporales basada en PyTorch diseñada para el aprendizaje automático interpretable. Sirve como un framework de descomposición que divide las señales en partes constituyentes como efectos autorregresivos, tendencias lineales por partes y estacionalidad basada en Fourier para predecir valores futuros. El proyecto se distingue por combinar redes neuronales con algoritmos tradicionales para producir pronósticos que explican los impulsores de tendencia subyacentes. Cuenta con un enfoque de modelado de series temporales global, lo que permite que un solo modelo se entrene en múltiples series simultáneas para compartir patrones aprendidos mientras se mantienen especificidades locales. Además, actúa como una herramienta de cuantificación de incertidumbre, empleando regresión de cuantiles y predicción conforme para generar intervalos de predicción confiables. La biblioteca proporciona un conjunto completo de capacidades para la gestión de datos, incluyendo la recuperación de días festivos, llenado de brechas y normalización. Cubre el ciclo de vida completo del modelado con optimización automatizada de hiperparámetros, detección de puntos de cambio de tendencia y la integración de regresores futuros y rezagados. El análisis se apoya a través de la descomposición de pronósticos y la atribución de entradas para visualizar cómo factores específicos influyen en las predicciones finales.
Translates user configurations for events and seasonality into the required input dimensions for neural network layers.
Xarray es una librería de arrays multidimensionales de Python y framework de conjuntos de datos etiquetados. Extiende la estructura de datos de NumPy añadiendo etiquetas a los arrays, permitiendo la organización de datos complejos N-dimensionales utilizando dimensiones y coordenadas con nombre. La librería proporciona una interfaz de datos NetCDF para leer y escribir formatos de datos científicos como NetCDF y Zarr. Permite la computación científica de arrays manteniendo la relación entre los datos y las coordenadas físicas durante las operaciones matemáticas. El proyecto cubre el análisis de datos multidimensionales, manipulación de datos geoespaciales y procesamiento de datos climáticos. También admite el análisis de series temporales para gestionar secuencias de observaciones a lo largo del tiempo.
Maps named dimensions to integer axis indices to automate coordinate alignment and array slicing.
NuttX es un sistema operativo en tiempo real compatible con POSIX diseñado para entornos embebidos con recursos limitados. Funciona como un SO de microcontrolador escalable que proporciona un entorno similar a Unix para gestionar hardware y ejecutar aplicaciones en arquitecturas que van desde 8 bits hasta 64 bits. El sistema garantiza una alta portabilidad del software al implementar un kernel que sigue los estándares POSIX y ANSI. Esto permite a los desarrolladores crear aplicaciones embebidas portátiles utilizando llamadas a la API estandarizadas en diversas arquitecturas de hardware. El proyecto incluye una arquitectura de kernel modular y una capa de abstracción de hardware para desacoplar el sistema de periféricos de chip específicos. Utiliza programación preventiva basada en prioridad para respuestas deterministas y proporciona herramientas para simular entornos de hardware para probar firmware sin placas físicas.
Maps hardware registers and system memory into a flat address space for direct peripheral access.
Rocket-chip is a framework for the parametric design, synthesis, and verification of RISC-V based processors and system-on-chip hardware. It functions as a generator that converts high-level specifications into synthesizable Verilog files for FPGA or ASIC implementation. The project utilizes a Scala-based hardware description framework to produce customizable pipelined processor cores, memory hierarchies, and peripheral devices. It employs a parameter-driven model and a two-phase negotiation process to resolve hardware interface specifications between modules during the elaboration phase. Th
Connects debug modules and JTAG interfaces to the processor via standardized memory-mapped register buses.