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chillancezen avatar

chillancezen/Zelda.RISCV.Emulator

0
View on GitHub↗
30 stars·9 forks·C·BSD-3-Clause·15 views

Zelda.RISCV.Emulator

A System Level RISCV32 Emulator Over x86_64: capable of booting RISCV Linux

Features

  • Hypervisor Implementations - RISC-V based hypervisor and emulator project.

Star history

Star history chart for chillancezen/zelda.riscv.emulatorStar history chart for chillancezen/zelda.riscv.emulator

How this analysis was created: This summary and feature list are AI-generated from collected project material and can contain mistakes. Stars, license and language are imported from GitHub. Inclusion does not mean that we have tested or audited this project. Check the source documentation for any feature you depend on. Learn more on our About page.

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Projects sharing features with Zelda.RISCV.Emulator

These projects share indexed features with Zelda.RISCV.Emulator. Shared tags can include platform or build tooling; verify the primary use case before treating a result as a replacement.
  • asamy/ksmasamy avatar

    asamy/ksm

    863View on GitHub↗

    A really simple and lightweight x64 hypervisor written in C for Intel processors. KSM has a self-contained physical memory introspection engine and userspace physical memory virtualization which can be enabled at compiletime.

    C
    View on GitHub↗863
  • bareflank/boxyBareflank avatar

    Bareflank/boxy

    63View on GitHub↗

    The Boxy Hypervisor is an open source hypervisor led by Assured Information Security, Inc. (AIS), that provides support for custom, lightweight Linux and Unikernel virtual machines on any platform including Windows, Linux and UEFI.

    C++
    View on GitHub↗63
  • bareflank/hypervisorBareflank avatar

    Bareflank/hypervisor

    1,497View on GitHub↗

    The Bareflank Hypervisor is an open source hypervisor Software Development Toolkit (SDK) for Rust and C++, led by Assured Information Security, Inc. (AIS), that provides the tools needed to rapidly prototype and create your own hypervisor on 64bit versions of Intel and AMD (ARMv8 CPUs, RISC-V…

    C++
    View on GitHub↗1,497
  • airbus-seclab/ramooflaxairbus-seclab avatar

    airbus-seclab/ramooflax

    185View on GitHub↗

    a bare metal (type 1) VMM (hypervisor) with a python remote control API

    C
    View on GitHub↗185
Compare all 30 related projects→

Frequently asked questions

What does chillancezen/zelda.riscv.emulator do?

A System Level RISCV32 Emulator Over x86_64: capable of booting RISCV Linux

What are the main features of chillancezen/zelda.riscv.emulator?

The main features of chillancezen/zelda.riscv.emulator are: Hypervisor Implementations.

Which projects share features with chillancezen/zelda.riscv.emulator?

Projects with overlapping indexed features include: asamy/ksm — A really simple and lightweight x64 hypervisor written in C for Intel processors. KSM has a self-contained physical… bareflank/boxy — The Boxy Hypervisor is an open source hypervisor led by Assured Information Security, Inc. (AIS), that provides… bareflank/hypervisor — The Bareflank Hypervisor is an open source hypervisor Software Development Toolkit (SDK) for Rust and C++, led by… bareflank/microv — warning: MicroV is currently a work in progress. If you need support now, please see the Mono branch until MicroV is… changeofpace/viviennevmm — VivienneVMM. airbus-seclab/ramooflax — a bare metal (type 1) VMM (hypervisor) with a python remote control API.