15 Repos
Software for converting machine code into human-readable assembly language.
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radare2 is a reverse engineering framework and binary analysis toolset. It functions as a multi-architecture disassembler, low-level binary debugger, and hexadecimal editor for inspecting executable structures and interpreting machine code when original source files are unavailable. The framework provides capabilities for decompiling machine instructions, performing symbolic analysis, and diffing binary files to identify structural changes across versions. It also includes a digital forensic analyzer and disk analyzer for browsing filesystem formats in userland. The toolset supports binary p
Maps machine-specific opcodes to a generic internal representation to support various CPU instruction sets.
BenchmarkDotNet is a library and tool suite for measuring the execution time and memory allocation of .NET code. It utilizes statistical sampling and warm-up iterations to determine the stability and precise execution speed of specific methods. The project provides a JIT disassembly viewer to inspect processor disassembly and analyze how the compiler executes code paths. It includes a memory allocation profiler that tracks managed and native memory traffic to identify efficiency bottlenecks. Additionally, a runtime performance comparator allows the same benchmarks to be executed across differ
Provides a tool that prints processor disassembly listings to analyze JIT compiler execution paths.
Capstone is a multi-architecture disassembly framework and binary analysis engine. It translates raw machine code from various CPU architectures, such as x86, ARM, and RISC-V, into human-readable assembly instructions. The engine distinguishes itself by providing instruction semantic decomposition, which lists implicit registers read and written, and the ability to customize instruction mnemonics to meet specific technical analysis standards. It also features resilient stream disassembly, allowing the process to resynchronize and continue after encountering invalid instructions or embedded da
Supports a wide range of processor architectures in a single framework for analyzing different hardware binaries.
Capstone is a multi-architecture disassembly framework and binary translation system. It converts binary machine code into human-readable assembly instructions for a wide variety of hardware instruction set architectures and virtual machines. The framework supports a diverse range of targets, including x86, ARM, RISC-V, and MIPS, as well as virtual machine environments like WebAssembly and the Ethereum Virtual Machine. It functions as an instruction analysis tool capable of extracting granular decomposition data and semantic information from disassembled code. The engine is designed for low-
Supports multiple CPU instruction sets and virtual machines via a unified disassembly engine.
ROPgadget ist ein Binäranalyse-Tool und Multi-Architektur-Disassembler, der darauf ausgelegt ist, Befehlssequenzen zu lokalisieren, die für Return-Oriented Programming (ROP) verwendet werden. Es fungiert als Exploit-Entwicklungs-Framework, das Gadgets innerhalb von Binärdateien identifiziert, um die Erstellung von Memory-Corruption-Exploits zu erleichtern. Das Tool unterstützt Cross-Architektur-Binär-Auditing und verarbeitet Maschinencode von x86, ARM, MIPS und RISC-V. Es bietet eine einheitliche Schnittstelle zur Analyse diverser ausführbarer Dateiformate, einschließlich ELF, PE und Mach-O. Die Funktionen decken Binär-Schwachstellenanalyse und Exploit-Payload-Entwicklung ab. Dies wird durch lineares Sweep-Disassembling, musterbasierte Gadget-Suche und Befehlssequenzvalidierung erreicht, um sicherzustellen, dass identifizierte Fragmente ausführbar sind.
Processes machine code from x86, ARM, MIPS, and RISC-V using a multi-architecture disassembly engine.
Zydis is an x86 and x86-64 binary analysis library that provides a framework for decoding machine code and inspecting the technical attributes of processor instructions. It functions as an instruction disassembler that translates binary data into structured instruction metadata and human-readable assembly. The project includes a machine code encoder for converting assembly instructions and operands back into their binary representations. It also provides an assembly syntax formatter to transform decoded instruction structures into assembly text strings using configurable syntax styles. The l
Fast and lightweight x86/x86-64 disassembler library.
SPIRV-Cross is a practical tool and library for performing reflection on SPIR-V and disassembling SPIR-V back to high level languages.
Tool for reflecting and disassembling SPIR-V shaders.
A libre cross-platform disassembler.
Cross-platform disassembler for various architectures.
Powerful Disassembler Library For x86/AMD64
Powerful disassembler library for x86/AMD64.
An open source interactive disassembler
Interactive open-source disassembler.
capstone based disassembler for extracting to binnavi
A disassembler and analysis tool for various architectures.