3 مستودعات
Adds support for multiple threads of execution running directly within the kernel itself for learning purposes.
Distinct from Kernel Thread Distinctions: Distinct from Kernel Thread Distinctions: focuses on implementation, not conceptual distinctions.
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This is a collection of academic programming projects that accompany an operating systems textbook, designed to teach core OS concepts through hands-on implementation. The projects span the major subsystems of an operating system, including process scheduling, memory management, file systems, and concurrency, with students building components from scratch in a simulated environment. The projects are structured to cover the full range of OS internals, from low-level kernel development to user-space system programming. Students implement lottery-based CPU schedulers, dynamic heap memory allocat
Includes a kernel thread implementation project that adds multi-threading support to a simulated OS.
TileLang is a Python-embedded domain-specific language compiler that JIT-compiles and autotunes GPU kernels. It uses a tile-based DSL, automatic software pipelining, and parallel autotuning to generate optimized GPU kernels at runtime. It supports tensor core operations with Pythonic syntax, automatic memory management, and thread mapping. The compiler searches over tile sizes, thread counts, and scheduling policies, compiling and benchmarking candidates in parallel to find the fastest kernel. It also caches compiled binaries and tuning results to disk for reuse across sessions. TileLang inc
Implements persistent thread-block patterns for dynamic work distribution across GPU thread blocks.
This project is an educational operating system kernel designed to demonstrate the fundamental architectural principles of memory paging and process management. It is implemented as a minimal kernel that serves as a practical reference for building a functioning system from the ground up. The implementation features a preemptive multitasking kernel that switches execution contexts between threads to share a single CPU. It includes an x86 virtual memory manager that uses paging to map virtual addresses to physical memory and isolate processes. The system covers low-level hardware interfacing
Implements a multitasking system with kernel threads for educational demonstration of process switching.